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Add NUCLEO-C092RC variant #2735

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May 26, 2025
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4 changes: 4 additions & 0 deletions 4 README.md
Original file line number Diff line number Diff line change
Expand Up @@ -129,6 +129,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
| :----: | :-------: | ---- | :-----: | :---- |
| :green_heart: | STM32C031C6 | [Nucleo C031C6](https://www.st.com/en/evaluation-tools/nucleo-c031c6.html) | *2.5.0* | |
| :green_heart: | STM32C071RB | [Nucleo C071RB](https://www.st.com/en/evaluation-tools/nucleo-c071rb.html) | *2.9.0* | |
| :yellow_heart: | STM32C092RC | [Nucleo C092RC](https://www.st.com/en/evaluation-tools/nucleo-c092rc.html)| **2.11.0** | |
| :green_heart: | STM32F030R8 | [Nucleo F030R8](http://www.st.com/en/evaluation-tools/nucleo-f030r8.html) | *0.2.0* | |
| :green_heart: | STM32F070RB | [Nucleo F070RB](http://www.st.com/en/evaluation-tools/nucleo-f070rb.html) | *2.0.0* | |
| :green_heart: | STM32F072RB | [Nucleo F072RB](http://www.st.com/en/evaluation-tools/nucleo-f072rb.html) | *1.9.0* | |
Expand Down Expand Up @@ -224,6 +225,9 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
| :green_heart: | STM32C031F4<br>STM32C031F6 | Generic Board | *2.6.0* | |
| :yellow_heart: | STM32C071G8<br>STM32C071GB | Generic Board | **2.11.0** | |
| :green_heart: | STM32C071R8<br>STM32C071RB | Generic Board | *2.9.0* | |
| :yellow_heart: | STM32C092CBT | Generic Board | **2.11.0** | |
| :yellow_heart: | STM32C092RBT<br>STM32C092RCT | Generic Board | **2.11.0** | |
| :yellow_heart: | STM32C092RCI | Generic Board | **2.11.0** | |

### Generic STM32F0 boards

Expand Down
50 changes: 50 additions & 0 deletions 50 boards.txt
Original file line number Diff line number Diff line change
Expand Up @@ -492,6 +492,20 @@ Nucleo_64.menu.pnum.NUCLEO_C071RB.build.st_extra_flags=-D{build.product_line} {b
Nucleo_64.menu.pnum.NUCLEO_C071RB.openocd.target=stm32c0x
Nucleo_64.menu.pnum.NUCLEO_C071RB.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C071.svd

# NUCLEO_C092RC board
Nucleo_64.menu.pnum.NUCLEO_C092RC=Nucleo C092RC
Nucleo_64.menu.pnum.NUCLEO_C092RC.node="NOD_C092RC"
Nucleo_64.menu.pnum.NUCLEO_C092RC.upload.maximum_size=262144
Nucleo_64.menu.pnum.NUCLEO_C092RC.upload.maximum_data_size=30720
Nucleo_64.menu.pnum.NUCLEO_C092RC.build.mcu=cortex-m0plus
Nucleo_64.menu.pnum.NUCLEO_C092RC.build.board=NUCLEO_C092RC
Nucleo_64.menu.pnum.NUCLEO_C092RC.build.series=STM32C0xx
Nucleo_64.menu.pnum.NUCLEO_C092RC.build.product_line=STM32C092xx
Nucleo_64.menu.pnum.NUCLEO_C092RC.build.variant=STM32C0xx/C092CBT_C092RBT_C092RC(I-T)
Nucleo_64.menu.pnum.NUCLEO_C092RC.build.st_extra_flags=-DSTM32C092xx {build.xSerial} -D__CORTEX_SC=0
Nucleo_64.menu.pnum.NUCLEO_C092RC.openocd.target=stm32c0x
Nucleo_64.menu.pnum.NUCLEO_C092RC.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C092.svd

# NUCLEO_F030R8 board
Nucleo_64.menu.pnum.NUCLEO_F030R8=Nucleo F030R8
Nucleo_64.menu.pnum.NUCLEO_F030R8.node="NODE_F030R8,NUCLEO"
Expand Down Expand Up @@ -1834,6 +1848,42 @@ GenC0.menu.pnum.GENERIC_C071RBTX.build.product_line=STM32C071xx
GenC0.menu.pnum.GENERIC_C071RBTX.build.variant=STM32C0xx/C071R(8-B)T
GenC0.menu.pnum.GENERIC_C071RBTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C071.svd

# Generic C092CBTx
GenC0.menu.pnum.GENERIC_C092CBTX=Generic C092CBTx
GenC0.menu.pnum.GENERIC_C092CBTX.upload.maximum_size=131072
GenC0.menu.pnum.GENERIC_C092CBTX.upload.maximum_data_size=30720
GenC0.menu.pnum.GENERIC_C092CBTX.build.board=GENERIC_C092CBTX
GenC0.menu.pnum.GENERIC_C092CBTX.build.product_line=STM32C092xx
GenC0.menu.pnum.GENERIC_C092CBTX.build.variant=STM32C0xx/C092CBT_C092RBT_C092RC(I-T)
GenC0.menu.pnum.GENERIC_C092CBTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C092.svd

# Generic C092RBTx
GenC0.menu.pnum.GENERIC_C092RBTX=Generic C092RBTx
GenC0.menu.pnum.GENERIC_C092RBTX.upload.maximum_size=131072
GenC0.menu.pnum.GENERIC_C092RBTX.upload.maximum_data_size=30720
GenC0.menu.pnum.GENERIC_C092RBTX.build.board=GENERIC_C092RBTX
GenC0.menu.pnum.GENERIC_C092RBTX.build.product_line=STM32C092xx
GenC0.menu.pnum.GENERIC_C092RBTX.build.variant=STM32C0xx/C092CBT_C092RBT_C092RC(I-T)
GenC0.menu.pnum.GENERIC_C092RBTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C092.svd

# Generic C092RCIx
GenC0.menu.pnum.GENERIC_C092RCIX=Generic C092RCIx
GenC0.menu.pnum.GENERIC_C092RCIX.upload.maximum_size=262144
GenC0.menu.pnum.GENERIC_C092RCIX.upload.maximum_data_size=30720
GenC0.menu.pnum.GENERIC_C092RCIX.build.board=GENERIC_C092RCIX
GenC0.menu.pnum.GENERIC_C092RCIX.build.product_line=STM32C092xx
GenC0.menu.pnum.GENERIC_C092RCIX.build.variant=STM32C0xx/C092CBT_C092RBT_C092RC(I-T)
GenC0.menu.pnum.GENERIC_C092RCIX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C092.svd

# Generic C092RCTx
GenC0.menu.pnum.GENERIC_C092RCTX=Generic C092RCTx
GenC0.menu.pnum.GENERIC_C092RCTX.upload.maximum_size=262144
GenC0.menu.pnum.GENERIC_C092RCTX.upload.maximum_data_size=30720
GenC0.menu.pnum.GENERIC_C092RCTX.build.board=GENERIC_C092RCTX
GenC0.menu.pnum.GENERIC_C092RCTX.build.product_line=STM32C092xx
GenC0.menu.pnum.GENERIC_C092RCTX.build.variant=STM32C0xx/C092CBT_C092RBT_C092RC(I-T)
GenC0.menu.pnum.GENERIC_C092RCTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C092.svd

# Upload menu
GenC0.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD)
GenC0.menu.upload_method.swdMethod.upload.protocol=swd
Expand Down
5 changes: 5 additions & 0 deletions 5 libraries/SrcWrapper/inc/stm32_def.h
Original file line number Diff line number Diff line change
Expand Up @@ -218,6 +218,11 @@ __STATIC_INLINE void LL_RTC_SetBinMixBCDU(RTC_TypeDef *RTCx, uint32_t BinMixBcdU
#define GPIO_AF1_SPI1 STM_PIN_AFNUM_MASK
#endif

#if defined(STM32C0xx) && defined(USART3) && !defined(GPIO_AF7_USART3)
#define GPIO_AF7_USART3 ((uint8_t)0x07)
#endif // STM32C0xx && !defined(USART3)


/**
* Libc porting layers
*/
Expand Down
4 changes: 2 additions & 2 deletions 4 libraries/SrcWrapper/inc/uart.h
Original file line number Diff line number Diff line change
Expand Up @@ -121,7 +121,7 @@ struct serial_s {
#define USART3_IRQn USART3_4_IRQn
#define USART3_IRQHandler USART3_4_IRQHandler
#endif /* STM32F091xC || STM32F098xx */
#elif defined(STM32G0xx)
#elif defined(STM32G0xx) || defined(STM32C0xx)
#if defined(LPUART2_BASE)
#define USART3_IRQn USART3_4_5_6_LPUART1_IRQn
#define USART3_IRQHandler USART3_4_5_6_LPUART1_IRQHandler
Expand Down Expand Up @@ -153,7 +153,7 @@ struct serial_s {
#endif /* STM32F091xC || STM32F098xx */
#elif defined(STM32L0xx)
#define USART4_IRQn USART4_5_IRQn
#elif defined(STM32G0xx)
#elif defined(STM32G0xx) || defined(STM32C0xx)
#if defined(LPUART2_BASE)
#define USART4_IRQn USART3_4_5_6_LPUART1_IRQn
#elif defined(LPUART1_BASE)
Expand Down
2 changes: 2 additions & 0 deletions 2 variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -21,7 +21,9 @@ target_link_libraries(variant INTERFACE variant_usage)
add_library(variant_bin STATIC EXCLUDE_FROM_ALL
generic_clock.c
PeripheralPins.c
PeripheralPins_NUCLEO_C092RC.c
variant_generic.cpp
variant_NUCLEO_C092RC.cpp
)
target_link_libraries(variant_bin PUBLIC variant_usage)

Expand Down
30 changes: 28 additions & 2 deletions 30 variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/generic_clock.c
Original file line number Diff line number Diff line change
Expand Up @@ -21,8 +21,34 @@
*/
WEAK void SystemClock_Config(void)
{
/* SystemClock_Config can be generated by STM32CubeMX */
#warning "SystemClock_Config() is empty. Default clock at reset is used."
RCC_OscInitTypeDef RCC_OscInitStruct = {};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};

__HAL_FLASH_SET_LATENCY(FLASH_LATENCY_1);

/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
Error_Handler();
}

/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
| RCC_CLOCKTYPE_PCLK1;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV1;

if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
Error_Handler();
}
}

#endif /* ARDUINO_GENERIC_* */
187 changes: 187 additions & 0 deletions 187 variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/ldscript.ld
Original file line number Diff line number Diff line change
@@ -0,0 +1,187 @@
/*
******************************************************************************
**
** @file : LinkerScript.ld
**
** @author : Auto-generated by STM32CubeIDE
**
** Abstract : Linker script for NUCLEO-C092RC Board embedding STM32C092RCTx Device from stm32c0 series
** 256KBytes FLASH
** 30KBytes RAM
**
** Set heap size, stack size and stack location according
** to application requirements.
**
** Set memory bank area and size if external memory is used
**
** Target : STMicroelectronics STM32
**
** Distribution: The file is distributed as is, without any warranty
** of any kind.
**
******************************************************************************
** @attention
**
** Copyright (c) 2025 STMicroelectronics.
** All rights reserved.
**
** This software is licensed under terms that can be found in the LICENSE file
** in the root directory of this software component.
** If no LICENSE file comes with this software, it is provided AS-IS.
**
******************************************************************************
*/

/* Entry Point */
ENTRY(Reset_Handler)

/* Highest address of the user mode stack */
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */

_Min_Heap_Size = 0x200; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */

/* Memories definition */
MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
}

/* Sections */
SECTIONS
{
/* The startup code into "FLASH" Rom type memory */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} >FLASH

/* The program code and other data into "FLASH" Rom type memory */
.text :
{
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
*(.eh_frame)

KEEP (*(.init))
KEEP (*(.fini))

. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
} >FLASH

/* Constant data into "FLASH" Rom type memory */
.rodata :
{
. = ALIGN(4);
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
. = ALIGN(4);
} >FLASH

.ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH

.ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
. = ALIGN(4);
} >FLASH

.preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
} >FLASH

.init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
} >FLASH

.fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .);
. = ALIGN(4);
} >FLASH

/* Used by the startup to initialize data */
_sidata = LOADADDR(.data);

/* Initialized data sections into "RAM" Ram type memory */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
*(.RamFunc) /* .RamFunc sections */
*(.RamFunc*) /* .RamFunc* sections */

. = ALIGN(4);
_edata = .; /* define a global symbol at data end */

} >RAM AT> FLASH

/* Uninitialized data section into "RAM" Ram type memory */
. = ALIGN(4);
.bss :
{
/* This is used by the startup in order to initialize the .bss section */
_sbss = .; /* define a global symbol at bss start */
__bss_start__ = _sbss;
*(.bss)
*(.bss*)
*(COMMON)

. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end */
__bss_end__ = _ebss;
} >RAM

/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
._user_heap_stack :
{
. = ALIGN(8);
PROVIDE ( end = . );
PROVIDE ( _end = . );
. = . + _Min_Heap_Size;
. = . + _Min_Stack_Size;
. = ALIGN(8);
} >RAM

/* Remove information from the compiler libraries */
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}

.ARM.attributes 0 : { *(.ARM.attributes) }
}
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