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Add NUCLEO-C092RC variant #2735
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Thanks for the PR.
I've made a first review, could you add also the generic (clock config, boards.txt, and reference in the README.md).
And fix the astyle issues.
variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/PeripheralPins_NUCLEO_C092RC.c
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variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/variant_NUCLEO_C092RC.h
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variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/variant_NUCLEO_C092RC.cpp
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Hm, you would expect that if you'd run astyle to fix formatting, that the same astyle would also pass all the formatting checks... |
Yes but they are rules and configuration to use. |
Co-authored-by: Frederic Pillon <frederic.pillon@st.com> Signed-off-by: Hugo <10338882+showengineer@users.noreply.github.com>
Co-authored-by: Frederic Pillon <frederic.pillon@st.com> Signed-off-by: Hugo <10338882+showengineer@users.noreply.github.com>
Signed-off-by: Hugo <10338882+showengineer@users.noreply.github.com>
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
I've clean up your PR:
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Ah thank you. Sorry, I am currently on vacation for a week without a laptop so I wasn't able to fix the rest yet. |
Summary
This PR fixes/implements the following bugs/features
USART3_IRQn
andUSART4_IRQn
toUSART3_4_IRQn
for STM32C0 processorsValidation
Code formatting
Notes
I mostly copied the variant files from the NUCLEO-C071RB variant, since both chips share the same pinout and most peripherals. I have not checked if FDCAN works, all else seems to work perfectly fine.