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/*
AppleWin : An Apple //e emulator for Windows
Copyright (C) 1994-1996, Michael O'Brien
Copyright (C) 1999-2001, Oliver Schmidt
Copyright (C) 2002-2005, Tom Charlesworth
Copyright (C) 2006-2007, Tom Charlesworth, Michael Pohoreski
AppleWin is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
AppleWin is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with AppleWin; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/* Description: Memory emulation
*
* Author: Various
*
* In comments, UTAIIe is an abbreviation for a reference to "Understanding the Apple //e" by James Sather
*/
#include "StdAfx.h"
#include "AppleWin.h"
#include "CPU.h"
#include "Disk.h"
#include "Frame.h"
#include "Harddisk.h"
#include "Joystick.h"
#include "Keyboard.h"
#include "Memory.h"
#include "Mockingboard.h"
#include "MouseInterface.h"
#include "NTSC.h"
#include "NoSlotClock.h"
#include "ParallelPrinter.h"
#include "Registry.h"
#include "SAM.h"
#include "SerialComms.h"
#include "Speaker.h"
#include "Tape.h"
#include "Video.h"
#include "z80emu.h"
#include "Z80VICE\z80.h"
#include "..\resource\resource.h"
#include "Configuration\PropertySheet.h"
#include "Debugger\DebugDefs.h"
#include "YamlHelper.h"
#define SW_80STORE (memmode & MF_80STORE)
#define SW_ALTZP (memmode & MF_ALTZP)
#define SW_AUXREAD (memmode & MF_AUXREAD)
#define SW_AUXWRITE (memmode & MF_AUXWRITE)
#define SW_BANK2 (memmode & MF_BANK2)
#define SW_HIGHRAM (memmode & MF_HIGHRAM)
#define SW_HIRES (memmode & MF_HIRES)
#define SW_PAGE2 (memmode & MF_PAGE2)
#define SW_SLOTC3ROM (memmode & MF_SLOTC3ROM)
#define SW_SLOTCXROM (memmode & MF_SLOTCXROM)
#define SW_WRITERAM (memmode & MF_WRITERAM)
/*
MEMORY MANAGEMENT SOFT SWITCHES
$C000 W 80STOREOFF Allow page2 to switch video page1 page2
$C001 W 80STOREON Allow page2 to switch main & aux video memory
$C002 W RAMRDOFF Read enable main memory from $0200-$BFFF
$C003 W RAMDRON Read enable aux memory from $0200-$BFFF
$C004 W RAMWRTOFF Write enable main memory from $0200-$BFFF
$C005 W RAMWRTON Write enable aux memory from $0200-$BFFF
$C006 W INTCXROMOFF Enable slot ROM from $C100-$C7FF (but $C800-$CFFF depends on INTC8ROM)
$C007 W INTCXROMON Enable main ROM from $C100-$CFFF
$C008 W ALTZPOFF Enable main memory from $0000-$01FF & avl BSR
$C009 W ALTZPON Enable aux memory from $0000-$01FF & avl BSR
$C00A W SLOTC3ROMOFF Enable main ROM from $C300-$C3FF
$C00B W SLOTC3ROMON Enable slot ROM from $C300-$C3FF
VIDEO SOFT SWITCHES
$C00C W 80COLOFF Turn off 80 column display
$C00D W 80COLON Turn on 80 column display
$C00E W ALTCHARSETOFF Turn off alternate characters
$C00F W ALTCHARSETON Turn on alternate characters
$C050 R/W TEXTOFF Select graphics mode
$C051 R/W TEXTON Select text mode
$C052 R/W MIXEDOFF Use full screen for graphics
$C053 R/W MIXEDON Use graphics with 4 lines of text
$C054 R/W PAGE2OFF Select panel display (or main video memory)
$C055 R/W PAGE2ON Select page2 display (or aux video memory)
$C056 R/W HIRESOFF Select low resolution graphics
$C057 R/W HIRESON Select high resolution graphics
SOFT SWITCH STATUS FLAGS
$C010 R7 AKD 1=key pressed 0=keys free (clears strobe)
$C011 R7 BSRBANK2 1=bank2 available 0=bank1 available
$C012 R7 BSRREADRAM 1=BSR active for read 0=$D000-$FFFF active
$C013 R7 RAMRD 0=main $0200-$BFFF active reads 1=aux active
$C014 R7 RAMWRT 0=main $0200-$BFFF active writes 1=aux writes
$C015 R7 INTCXROM 1=main $C100-$CFFF ROM active 0=slot active
$C016 R7 ALTZP 1=aux $0000-$1FF+auxBSR 0=main available
$C017 R7 SLOTC3ROM 1=slot $C3 ROM active 0=main $C3 ROM active
$C018 R7 80STORE 1=page2 switches main/aux 0=page2 video
$C019 R7 VERTBLANK 1=vertical retrace on 0=vertical retrace off
$C01A R7 TEXT 1=text mode is active 0=graphics mode active
$C01B R7 MIXED 1=mixed graphics & text 0=full screen
$C01C R7 PAGE2 1=video page2 selected or aux
$C01D R7 HIRES 1=high resolution graphics 0=low resolution
$C01E R7 ALTCHARSET 1=alt character set on 0=alt char set off
$C01F R7 80COL 1=80 col display on 0=80 col display off
*/
//-----------------------------------------------------------------------------
// Notes
// -----
//
// mem
// - a copy of the memimage ptr
//
// memimage
// - 64KB
// - reflects the current readable memory in the 6502's 64K address space
// . excludes $Cxxx I/O memory
// . could be a mix of RAM/ROM, main/aux, etc
//
// memmain, memaux
// - physical contiguous 64KB RAM for main & aux respectively
//
// memwrite
// - 1 ptr entry per 256-byte page
// - used to write to a page
//
// memdirty
// - 1 byte entry per 256-byte page
// - set when a write occurs to a 256-byte page
//
// memshadow
// - 1 ptr entry per 256-byte page
// - reflects how 'mem' is setup
// . EG: if ALTZP=1, then:
// . mem will have copies of memaux's ZP & stack
// . memshadow[0] = &memaux[0x0000]
// . memshadow[1] = &memaux[0x0100]
//
static LPBYTE memshadow[0x100];
LPBYTE memwrite[0x100];
iofunction IORead[256];
iofunction IOWrite[256];
static LPVOID SlotParameters[NUM_SLOTS];
static BOOL g_bLastWriteRam = 0;
LPBYTE mem = NULL;
//
static LPBYTE memaux = NULL;
static LPBYTE memmain = NULL;
LPBYTE memdirty = NULL;
static LPBYTE memrom = NULL;
static LPBYTE memimage = NULL;
static LPBYTE pCxRomInternal = NULL;
static LPBYTE pCxRomPeripheral = NULL;
DWORD memmode = MF_BANK2 | MF_SLOTCXROM | MF_WRITERAM; // 2.9.0.4 now global as Debugger needs access for LC status info in DrawSoftSwitches()
static BOOL modechanging = 0; // An Optimisation: means delay calling UpdatePaging() for 1 instruction
static BOOL Pravets8charmode = 0;
static CNoSlotClock g_NoSlotClock;
#ifdef RAMWORKS
UINT g_uMaxExPages = 1; // user requested ram pages (default to 1 aux bank: so total = 128KB)
UINT g_uActiveBank = 0; // 0 = aux 64K for: //e extended 80 Col card, or //c -- ALSO RAMWORKS
static LPBYTE RWpages[kMaxExMemoryBanks]; // pointers to RW memory banks
#endif
#ifdef SATURN
UINT g_uSaturnTotalBanks = 0; // Will be > 0 if Saturn card is "installed"
UINT g_uSaturnActiveBank = 0; // Saturn 128K Language Card Bank 0 .. 7
static LPBYTE g_aSaturnPages[8];
#endif // SATURN
MemoryType_e g_eMemType = MEM_TYPE_NATIVE; // 0 = Native memory, 1=RAMWORKS, 2 = SATURN
BYTE __stdcall IO_Annunciator(WORD programcounter, WORD address, BYTE write, BYTE value, ULONG nCycles);
//=============================================================================
static BYTE __stdcall IORead_C00x(WORD pc, WORD addr, BYTE bWrite, BYTE d, ULONG nCyclesLeft)
{
return KeybReadData(pc, addr, bWrite, d, nCyclesLeft);
}
static BYTE __stdcall IOWrite_C00x(WORD pc, WORD addr, BYTE bWrite, BYTE d, ULONG nCyclesLeft)
{
if ((addr & 0xf) <= 0xB)
return MemSetPaging(pc, addr, bWrite, d, nCyclesLeft);
else
return VideoSetMode(pc, addr, bWrite, d, nCyclesLeft);
}
//-------------------------------------
static BYTE __stdcall IORead_C01x(WORD pc, WORD addr, BYTE bWrite, BYTE d, ULONG nCyclesLeft)
{
switch (addr & 0xf)
{
case 0x0: return KeybReadFlag(pc, addr, bWrite, d, nCyclesLeft);
case 0x1: return MemCheckPaging(pc, addr, bWrite, d, nCyclesLeft);
case 0x2: return MemCheckPaging(pc, addr, bWrite, d, nCyclesLeft);
case 0x3: return MemCheckPaging(pc, addr, bWrite, d, nCyclesLeft);
case 0x4: return MemCheckPaging(pc, addr, bWrite, d, nCyclesLeft);
case 0x5: return MemCheckPaging(pc, addr, bWrite, d, nCyclesLeft);
case 0x6: return MemCheckPaging(pc, addr, bWrite, d, nCyclesLeft);
case 0x7: return MemCheckPaging(pc, addr, bWrite, d, nCyclesLeft);
case 0x8: return MemCheckPaging(pc, addr, bWrite, d, nCyclesLeft);
case 0x9: return VideoCheckVbl(nCyclesLeft);
case 0xA: return VideoCheckMode(pc, addr, bWrite, d, nCyclesLeft);
case 0xB: return VideoCheckMode(pc, addr, bWrite, d, nCyclesLeft);
case 0xC: return MemCheckPaging(pc, addr, bWrite, d, nCyclesLeft);
case 0xD: return MemCheckPaging(pc, addr, bWrite, d, nCyclesLeft);
case 0xE: return VideoCheckMode(pc, addr, bWrite, d, nCyclesLeft);
case 0xF: return VideoCheckMode(pc, addr, bWrite, d, nCyclesLeft);
}
return 0;
}
static BYTE __stdcall IOWrite_C01x(WORD pc, WORD addr, BYTE bWrite, BYTE d, ULONG nCyclesLeft)
{
return KeybReadFlag(pc, addr, bWrite, d, nCyclesLeft);
}
//-------------------------------------
static BYTE __stdcall IORead_C02x(WORD pc, WORD addr, BYTE bWrite, BYTE d, ULONG nCyclesLeft)
{
return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
}
static BYTE __stdcall IOWrite_C02x(WORD pc, WORD addr, BYTE bWrite, BYTE d, ULONG nCyclesLeft)
{
return IO_Null(pc, addr, bWrite, d, nCyclesLeft); // $C020 TAPEOUT
}
//-------------------------------------
static BYTE __stdcall IORead_C03x(WORD pc, WORD addr, BYTE bWrite, BYTE d, ULONG nCyclesLeft)
{
return SpkrToggle(pc, addr, bWrite, d, nCyclesLeft);
}
static BYTE __stdcall IOWrite_C03x(WORD pc, WORD addr, BYTE bWrite, BYTE d, ULONG nCyclesLeft)
{
return SpkrToggle(pc, addr, bWrite, d, nCyclesLeft);
}
//-------------------------------------
static BYTE __stdcall IORead_C04x(WORD pc, WORD addr, BYTE bWrite, BYTE d, ULONG nCyclesLeft)
{
return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
}
static BYTE __stdcall IOWrite_C04x(WORD pc, WORD addr, BYTE bWrite, BYTE d, ULONG nCyclesLeft)
{
return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
}
//-------------------------------------
static BYTE __stdcall IORead_C05x(WORD pc, WORD addr, BYTE bWrite, BYTE d, ULONG nCyclesLeft)
{
switch (addr & 0xf)
{
case 0x0: return VideoSetMode(pc, addr, bWrite, d, nCyclesLeft);
case 0x1: return VideoSetMode(pc, addr, bWrite, d, nCyclesLeft);
case 0x2: return VideoSetMode(pc, addr, bWrite, d, nCyclesLeft);
case 0x3: return VideoSetMode(pc, addr, bWrite, d, nCyclesLeft);
case 0x4: return MemSetPaging(pc, addr, bWrite, d, nCyclesLeft);
case 0x5: return MemSetPaging(pc, addr, bWrite, d, nCyclesLeft);
case 0x6: return MemSetPaging(pc, addr, bWrite, d, nCyclesLeft);
case 0x7: return MemSetPaging(pc, addr, bWrite, d, nCyclesLeft);
case 0x8: return IO_Annunciator(pc, addr, bWrite, d, nCyclesLeft);
case 0x9: return IO_Annunciator(pc, addr, bWrite, d, nCyclesLeft);
case 0xA: return IO_Annunciator(pc, addr, bWrite, d, nCyclesLeft);
case 0xB: return IO_Annunciator(pc, addr, bWrite, d, nCyclesLeft);
case 0xC: return IO_Annunciator(pc, addr, bWrite, d, nCyclesLeft);
case 0xD: return IO_Annunciator(pc, addr, bWrite, d, nCyclesLeft);
case 0xE: return VideoSetMode(pc, addr, bWrite, d, nCyclesLeft);
case 0xF: return VideoSetMode(pc, addr, bWrite, d, nCyclesLeft);
}
return 0;
}
static BYTE __stdcall IOWrite_C05x(WORD pc, WORD addr, BYTE bWrite, BYTE d, ULONG nCyclesLeft)
{
switch (addr & 0xf)
{
case 0x0: return VideoSetMode(pc, addr, bWrite, d, nCyclesLeft);
case 0x1: return VideoSetMode(pc, addr, bWrite, d, nCyclesLeft);
case 0x2: return VideoSetMode(pc, addr, bWrite, d, nCyclesLeft);
case 0x3: return VideoSetMode(pc, addr, bWrite, d, nCyclesLeft);
case 0x4: return MemSetPaging(pc, addr, bWrite, d, nCyclesLeft);
case 0x5: return MemSetPaging(pc, addr, bWrite, d, nCyclesLeft);
case 0x6: return MemSetPaging(pc, addr, bWrite, d, nCyclesLeft);
case 0x7: return MemSetPaging(pc, addr, bWrite, d, nCyclesLeft);
case 0x8: return IO_Annunciator(pc, addr, bWrite, d, nCyclesLeft);
case 0x9: return IO_Annunciator(pc, addr, bWrite, d, nCyclesLeft);
case 0xA: return IO_Annunciator(pc, addr, bWrite, d, nCyclesLeft);
case 0xB: return IO_Annunciator(pc, addr, bWrite, d, nCyclesLeft);
case 0xC: return IO_Annunciator(pc, addr, bWrite, d, nCyclesLeft);
case 0xD: return IO_Annunciator(pc, addr, bWrite, d, nCyclesLeft);
case 0xE: return VideoSetMode(pc, addr, bWrite, d, nCyclesLeft);
case 0xF: return VideoSetMode(pc, addr, bWrite, d, nCyclesLeft);
}
return 0;
}
//-------------------------------------
static BYTE __stdcall IORead_C06x(WORD pc, WORD addr, BYTE bWrite, BYTE d, ULONG nCyclesLeft)
{
static byte CurrentKestroke = 0;
CurrentKestroke = KeybGetKeycode();
switch (addr & 0x7) // address bit 4 is ignored (UTAIIe page 7-5)
{
//In Pravets8A/C if SETMODE (8bit character encoding) is enabled, bit6 in $C060 is 0; Else it is 1
//If (CAPS lOCK of Pravets8A/C is on or Shift is pressed) and (MODE is enabled), bit7 in $C000 is 1; Else it is 0
//Writing into $C060 sets MODE on and off. If bit 0 is 0 the the MODE is set 0, if bit 0 is 1 then MODE is set to 1 (8-bit)
case 0x0: return TapeRead(pc, addr, bWrite, d, nCyclesLeft); // $C060 TAPEIN
case 0x1: return JoyReadButton(pc, addr, bWrite, d, nCyclesLeft); //$C061 Digital input 0 (If bit 7=1 then JoyButton 0 or OpenApple is pressed)
case 0x2: return JoyReadButton(pc, addr, bWrite, d, nCyclesLeft); //$C062 Digital input 1 (If bit 7=1 then JoyButton 1 or ClosedApple is pressed)
case 0x3: return JoyReadButton(pc, addr, bWrite, d, nCyclesLeft); //$C063 Digital input 2
case 0x4: return JoyReadPosition(pc, addr, bWrite, d, nCyclesLeft); //$C064 Analog input 0
case 0x5: return JoyReadPosition(pc, addr, bWrite, d, nCyclesLeft); //$C065 Analog input 1
case 0x6: return JoyReadPosition(pc, addr, bWrite, d, nCyclesLeft); //$C066 Analog input 2
case 0x7: return JoyReadPosition(pc, addr, bWrite, d, nCyclesLeft); //$C067 Analog input 3
}
return 0;
}
static BYTE __stdcall IOWrite_C06x(WORD pc, WORD addr, BYTE bWrite, BYTE d, ULONG nCyclesLeft)
{
switch (addr & 0xf)
{
case 0x0:
if (g_Apple2Type == A2TYPE_PRAVETS8A )
return TapeWrite (pc, addr, bWrite, d, nCyclesLeft);
else
return IO_Null(pc, addr, bWrite, d, nCyclesLeft); //Apple2 value
}
return IO_Null(pc, addr, bWrite, d, nCyclesLeft); //Apple2 value
}
//-------------------------------------
static BYTE __stdcall IORead_C07x(WORD pc, WORD addr, BYTE bWrite, BYTE d, ULONG nCyclesLeft)
{
switch (addr & 0xf)
{
case 0x0: return JoyResetPosition(pc, addr, bWrite, d, nCyclesLeft); //$C070 Analog input reset
case 0x1: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0x2: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0x3: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0x4: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0x5: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0x6: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0x7: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0x8: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0x9: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0xA: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0xB: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0xC: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0xD: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0xE: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0xF: return VideoCheckMode(pc, addr, bWrite, d, nCyclesLeft);
}
return 0;
}
static BYTE __stdcall IOWrite_C07x(WORD pc, WORD addr, BYTE bWrite, BYTE d, ULONG nCyclesLeft)
{
switch (addr & 0xf)
{
case 0x0: return JoyResetPosition(pc, addr, bWrite, d, nCyclesLeft);
#ifdef RAMWORKS
case 0x1: return MemSetPaging(pc, addr, bWrite, d, nCyclesLeft); // extended memory card set page
case 0x2: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0x3: return MemSetPaging(pc, addr, bWrite, d, nCyclesLeft); // Ramworks III set page
#else
case 0x1: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0x2: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0x3: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
#endif
case 0x4: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0x5: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0x6: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0x7: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0x8: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0x9: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0xA: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0xB: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0xC: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
case 0xD: return IO_Null(pc, addr, bWrite, d, nCyclesLeft);
//http://www.kreativekorp.com/miscpages/a2info/iomemory.shtml
//- Apparently Apple//e & //c (but maybe enhanced//e not //e?)
//IOUDISON (W): $C07E Disable IOU
//IOUDISOFF (W): $C07F Enable IOU
//RDIOUDIS (R7): $C07E Status of IOU Disabling
//RDDHIRES (R7): $C07F Status of Double HiRes
case 0xE: return IO_Null(pc, addr, bWrite, d, nCyclesLeft); // TODO: IOUDIS
case 0xF: return IO_Null(pc, addr, bWrite, d, nCyclesLeft); // TODO: IOUDIS
}
return 0;
}
//-----------------------------------------------------------------------------
static iofunction IORead_C0xx[8] =
{
IORead_C00x, // Keyboard
IORead_C01x, // Memory/Video
IORead_C02x, // Cassette
IORead_C03x, // Speaker
IORead_C04x,
IORead_C05x, // Video
IORead_C06x, // Joystick
IORead_C07x, // Joystick/Video
};
static iofunction IOWrite_C0xx[8] =
{
IOWrite_C00x, // Memory/Video
IOWrite_C01x, // Keyboard
IOWrite_C02x, // Cassette
IOWrite_C03x, // Speaker
IOWrite_C04x,
IOWrite_C05x, // Video/Memory
IOWrite_C06x,
IOWrite_C07x, // Joystick/Ramworks
};
static BYTE IO_SELECT = 0;
static bool INTC8ROM = false; // UTAIIe:5-28
static BYTE* ExpansionRom[NUM_SLOTS];
enum eExpansionRomType {eExpRomNull=0, eExpRomInternal, eExpRomPeripheral};
static eExpansionRomType g_eExpansionRomType = eExpRomNull;
static UINT g_uPeripheralRomSlot = 0;
//=============================================================================
BYTE __stdcall IO_Null(WORD programcounter, WORD address, BYTE write, BYTE value, ULONG nCyclesLeft)
{
if (!write)
return MemReadFloatingBus(nCyclesLeft);
else
return 0;
}
BYTE __stdcall IO_Annunciator(WORD programcounter, WORD address, BYTE write, BYTE value, ULONG nCyclesLeft)
{
// Apple//e ROM:
// . PC=FA6F: LDA $C058 (SETAN0)
// . PC=FA72: LDA $C05A (SETAN1)
// . PC=C2B5: LDA $C05D (CLRAN2)
// NB. AN3: For //e & //c these locations are now used to enabled/disabled DHIRES
if (address >= 0xC058 && address <= 0xC05B)
{
JoyportControl(address & 0x3); // AN0 and AN1 control
}
if (!write)
return MemReadFloatingBus(nCyclesLeft);
else
return 0;
}
inline bool IsPotentialNoSlotClockAccess(const WORD address)
{
// Ref: Sather UAIIe 5-28
const BYTE AddrHi = address >> 8;
return ( ((!SW_SLOTCXROM || !SW_SLOTC3ROM) && (AddrHi == 0xC3)) || // Internal ROM at [$C100-CFFF or $C300-C3FF] && AddrHi == $C3
(!SW_SLOTCXROM && (AddrHi == 0xC8)) ); // Internal ROM at [$C100-CFFF] && AddrHi == $C8
}
static bool IsCardInSlot(const UINT uSlot);
// Enabling expansion ROM ($C800..$CFFF]:
// . Enable if: Enable1 && Enable2
// . Enable1 = I/O SELECT' (6502 accesses $Csxx)
// - Reset when 6502 accesses $CFFF
// . Enable2 = I/O STROBE' (6502 accesses [$C800..$CFFF])
// TODO:
// . IO_SELECT and INTC8ROM are sticky - they only getting reset by $CFFF and MemReset()
// . Check Sather UAIIe, but I assume that a 6502 access to a non-$Csxx (and non-expansion ROM) location will clear IO_SELECT
// NB. ProDOS boot sets IO_SELECT=0x04 (its scan for boot devices?), as slot2 contains a card (ie. SSC) with an expansion ROM.
//
// -----------
// UTAIIe:5-28
// $C100-C2FF
// INTCXROM(*) SLOTC3ROM $C400-CFFF $C300-C3FF
// 0 0 slot internal
// 0 1 slot slot
// 1 0 internal internal
// 1 1 internal internal
//
// (*) SLOTCXROM'
// -----------
//
// INTC8ROM: Unreadable soft switch (UTAIIe:5-28)
// . Set: Access to $C3XX with SLOTC3ROM reset
// . Reset: Access to $CFFF or an MMU reset
//
static BYTE __stdcall IO_Cxxx(WORD programcounter, WORD address, BYTE write, BYTE value, ULONG nCyclesLeft)
{
if (address == 0xCFFF)
{
// Disable expansion ROM at [$C800..$CFFF]
// . SSC will disable on an access to $CFxx - but ROM only accesses $CFFF, so it doesn't matter
IO_SELECT = 0;
INTC8ROM = false;
g_uPeripheralRomSlot = 0;
if (SW_SLOTCXROM)
{
// NB. SW_SLOTCXROM==0 ensures that internal rom stays switched in
memset(pCxRomPeripheral+0x800, 0, FIRMWARE_EXPANSION_SIZE);
memset(mem+FIRMWARE_EXPANSION_BEGIN, 0, FIRMWARE_EXPANSION_SIZE);
g_eExpansionRomType = eExpRomNull;
}
// NB. IO_SELECT won't get set, so ROM won't be switched back in...
}
//
BYTE IO_STROBE = 0;
if (IS_APPLE2 || SW_SLOTCXROM)
{
if ((address >= APPLE_SLOT_BEGIN) && (address <= APPLE_SLOT_END))
{
const UINT uSlot = (address>>8)&0x7;
if (uSlot != 3)
{
if (ExpansionRom[uSlot])
IO_SELECT |= 1<<uSlot;
}
else // slot3
{
if ((SW_SLOTC3ROM) && ExpansionRom[uSlot])
IO_SELECT |= 1<<uSlot; // Slot3 & Peripheral ROM
else if (!SW_SLOTC3ROM)
INTC8ROM = true; // Slot3 & Internal ROM
}
}
else if ((address >= FIRMWARE_EXPANSION_BEGIN) && (address <= FIRMWARE_EXPANSION_END))
{
if (!INTC8ROM) // [GH#423] UTAIIe:5-28: if INTCXROM or INTC8ROM is configured for internal response,
// then access to $C800-$CFFF results in ROMEN1' low (active) and I/O STROBE' high (inactive)
IO_STROBE = 1;
}
//
if (IO_SELECT && IO_STROBE)
{
// Enable Peripheral Expansion ROM
UINT uSlot=1;
for (; uSlot<NUM_SLOTS; uSlot++)
{
if (IO_SELECT & (1<<uSlot))
{
BYTE RemainingSelected = IO_SELECT & ~(1<<uSlot);
_ASSERT(RemainingSelected == 0);
break;
}
}
if (ExpansionRom[uSlot] && (g_uPeripheralRomSlot != uSlot))
{
memcpy(pCxRomPeripheral+0x800, ExpansionRom[uSlot], FIRMWARE_EXPANSION_SIZE);
memcpy(mem+FIRMWARE_EXPANSION_BEGIN, ExpansionRom[uSlot], FIRMWARE_EXPANSION_SIZE);
g_eExpansionRomType = eExpRomPeripheral;
g_uPeripheralRomSlot = uSlot;
}
}
else if (INTC8ROM && (g_eExpansionRomType != eExpRomInternal))
{
// Enable Internal ROM
// . Get this for PR#3
memcpy(mem+FIRMWARE_EXPANSION_BEGIN, pCxRomInternal+0x800, FIRMWARE_EXPANSION_SIZE);
g_eExpansionRomType = eExpRomInternal;
g_uPeripheralRomSlot = 0;
}
}
if (IsPotentialNoSlotClockAccess(address))
{
if (!write)
{
int data = 0;
if (g_NoSlotClock.Read(address, data))
return (BYTE) data;
}
else
{
g_NoSlotClock.Write(address);
return 0;
}
}
if (!IS_APPLE2 && !SW_SLOTCXROM)
{
// !SW_SLOTC3ROM = Internal ROM: $C300-C3FF
// !SW_SLOTCXROM = Internal ROM: $C100-CFFF
if ((address >= 0xC300) && (address <= 0xC3FF))
{
if (!SW_SLOTC3ROM) // GH#423
INTC8ROM = true;
}
else if ((address >= FIRMWARE_EXPANSION_BEGIN) && (address <= FIRMWARE_EXPANSION_END))
{
if (!INTC8ROM) // GH#423
IO_STROBE = 1;
}
if (INTC8ROM && (g_eExpansionRomType != eExpRomInternal))
{
// Enable Internal ROM
memcpy(mem+FIRMWARE_EXPANSION_BEGIN, pCxRomInternal+0x800, FIRMWARE_EXPANSION_SIZE);
g_eExpansionRomType = eExpRomInternal;
g_uPeripheralRomSlot = 0;
}
}
if (address >= APPLE_SLOT_BEGIN && address <= APPLE_SLOT_END)
{
const UINT uSlot = (address>>8)&0x7;
const bool bPeripheralSlotRomEnabled = IS_APPLE2 ? true // A][
: // A//e or above
( (SW_SLOTCXROM) && // Peripheral (card) ROMs enabled in $C100..$C7FF
!(!SW_SLOTC3ROM && uSlot == 3) ); // Internal C3 ROM disabled in $C300 when slot == 3
// Fix for GH#149 and GH#164
if (bPeripheralSlotRomEnabled && !IsCardInSlot(uSlot)) // Slot is empty
{
return IO_Null(programcounter, address, write, value, nCyclesLeft);
}
}
if ((g_eExpansionRomType == eExpRomNull) && (address >= FIRMWARE_EXPANSION_BEGIN))
return IO_Null(programcounter, address, write, value, nCyclesLeft);
return mem[address];
}
//===========================================================================
static struct SlotInfo
{
bool bHasCard;
iofunction IOReadCx;
iofunction IOWriteCx;
} g_SlotInfo[NUM_SLOTS] = {0};
static void InitIoHandlers()
{
UINT i=0;
for (; i<8; i++) // C00x..C07x
{
IORead[i] = IORead_C0xx[i];
IOWrite[i] = IOWrite_C0xx[i];
}
for (; i<16; i++) // C08x..C0Fx
{
IORead[i] = IO_Null;
IOWrite[i] = IO_Null;
}
//
for (; i<256; i++) // C10x..CFFx
{
IORead[i] = IO_Cxxx;
IOWrite[i] = IO_Cxxx;
}
//
for (i=0; i<NUM_SLOTS; i++)
{
g_SlotInfo[i].bHasCard = false;
g_SlotInfo[i].IOReadCx = IO_Cxxx;
g_SlotInfo[i].IOWriteCx = IO_Cxxx;
ExpansionRom[i] = NULL;
}
}
// All slots [0..7] must register their handlers
void RegisterIoHandler(UINT uSlot, iofunction IOReadC0, iofunction IOWriteC0, iofunction IOReadCx, iofunction IOWriteCx, LPVOID lpSlotParameter, BYTE* pExpansionRom)
{
_ASSERT(uSlot < NUM_SLOTS);
SlotParameters[uSlot] = lpSlotParameter;
IORead[uSlot+8] = IOReadC0;
IOWrite[uSlot+8] = IOWriteC0;
if (uSlot == 0) // Don't trash C0xx handlers
return;
if (IOReadCx == NULL) IOReadCx = IO_Cxxx;
if (IOWriteCx == NULL) IOWriteCx = IO_Cxxx;
for (UINT i=0; i<16; i++)
{
IORead[uSlot*16+i] = IOReadCx;
IOWrite[uSlot*16+i] = IOWriteCx;
}
g_SlotInfo[uSlot].bHasCard = true;
g_SlotInfo[uSlot].IOReadCx = IOReadCx;
g_SlotInfo[uSlot].IOWriteCx = IOWriteCx;
// What about [$C80x..$CFEx]? - Do any cards use this as I/O memory?
ExpansionRom[uSlot] = pExpansionRom;
}
// From UTAIIe:5-28: Since INTCXROM==1 (SLOTCXROM==0) then state of SLOTC3ROM is not important
static void IoHandlerCardsOut(void)
{
_ASSERT( !SW_SLOTCXROM ); // INTCXROM==1
for (UINT uSlot=1; uSlot<NUM_SLOTS; uSlot++)
{
for (UINT i=0; i<16; i++)
{
IORead[uSlot*16+i] = IO_Cxxx;
IOWrite[uSlot*16+i] = IO_Cxxx;
}
}
}
static void IoHandlerCardsIn(void)
{
_ASSERT( SW_SLOTCXROM ); // INTCXROM==0
for (UINT uSlot=1; uSlot<NUM_SLOTS; uSlot++)
{
iofunction ioreadcx = g_SlotInfo[uSlot].IOReadCx;
iofunction iowritecx = g_SlotInfo[uSlot].IOWriteCx;
if (uSlot == 3 && !SW_SLOTC3ROM)
{
// From UTAIIe:5-28: If INTCXROM==0 (SLOTCXROM==1) && SLOTC3ROM==0 Then $C300-C3FF is internal ROM
ioreadcx = IO_Cxxx;
iowritecx = IO_Cxxx;
}
for (UINT i=0; i<16; i++)
{
IORead[uSlot*16+i] = ioreadcx;
IOWrite[uSlot*16+i] = iowritecx;
}
}
}
static bool IsCardInSlot(const UINT uSlot)
{
return g_SlotInfo[uSlot].bHasCard;
}
//===========================================================================
static void BackMainImage(void)
{
for (UINT loop = 0; loop < 256; loop++)
{
if (memshadow[loop] && ((*(memdirty+loop) & 1) || (loop <= 1)))
CopyMemory(memshadow[loop], memimage+(loop << 8), 256);
*(memdirty+loop) &= ~1;
}
}
//===========================================================================
static void SetMemMode(const DWORD uNewMemMode)
{
#if defined(_DEBUG) && 0
static DWORD dwOldDiff = 0;
DWORD dwDiff = memmode ^ uNewMemMode;
dwDiff &= ~(MF_SLOTC3ROM | MF_SLOTCXROM);
if (dwOldDiff != dwDiff)
{
dwOldDiff = dwDiff;
char szStr[100];
char* psz = szStr;
psz += sprintf(psz, "diff = %08X ", dwDiff);
psz += sprintf(psz, "80=%d " , SW_80STORE ? 1 : 0);
psz += sprintf(psz, "ALTZP=%d ", SW_ALTZP ? 1 : 0);
psz += sprintf(psz, "AUXR=%d " , SW_AUXREAD ? 1 : 0);
psz += sprintf(psz, "AUXW=%d " , SW_AUXWRITE ? 1 : 0);
psz += sprintf(psz, "BANK2=%d ", SW_BANK2 ? 1 : 0);
psz += sprintf(psz, "HIRAM=%d ", SW_HIGHRAM ? 1 : 0);
psz += sprintf(psz, "HIRES=%d ", SW_HIRES ? 1 : 0);
psz += sprintf(psz, "PAGE2=%d ", SW_PAGE2 ? 1 : 0);
psz += sprintf(psz, "C3=%d " , SW_SLOTC3ROM ? 1 : 0);
psz += sprintf(psz, "CX=%d " , SW_SLOTCXROM ? 1 : 0);
psz += sprintf(psz, "WRAM=%d " , SW_WRITERAM ? 1 : 0);
psz += sprintf(psz, "\n");
OutputDebugString(szStr);
}
#endif
memmode = uNewMemMode;
}
//===========================================================================
static void ResetPaging(BOOL initialize);
static void UpdatePaging(BOOL initialize);
// Call by:
// . CtrlReset() Soft-reset (Ctrl+Reset)
void MemResetPaging()
{
ResetPaging(0); // Initialize=0
}
static void ResetPaging(BOOL initialize)
{
g_bLastWriteRam = 0;
SetMemMode(MF_BANK2 | MF_SLOTCXROM | MF_WRITERAM);
UpdatePaging(initialize);
}
//===========================================================================
void MemUpdatePaging(BOOL initialize)
{
UpdatePaging(initialize);
}
static void UpdatePaging(BOOL initialize)
{
// SAVE THE CURRENT PAGING SHADOW TABLE
LPBYTE oldshadow[256];
if (!initialize)
CopyMemory(oldshadow,memshadow,256*sizeof(LPBYTE));
// UPDATE THE PAGING TABLES BASED ON THE NEW PAGING SWITCH VALUES
UINT loop;
if (initialize)
{
for (loop = 0x00; loop < 0xC0; loop++)
memwrite[loop] = mem+(loop << 8);
for (loop = 0xC0; loop < 0xD0; loop++)
memwrite[loop] = NULL;
}
for (loop = 0x00; loop < 0x02; loop++)
memshadow[loop] = SW_ALTZP ? memaux+(loop << 8) : memmain+(loop << 8);
for (loop = 0x02; loop < 0xC0; loop++)
{
memshadow[loop] = SW_AUXREAD ? memaux+(loop << 8)
: memmain+(loop << 8);
memwrite[loop] = ((SW_AUXREAD != 0) == (SW_AUXWRITE != 0))
? mem+(loop << 8)
: SW_AUXWRITE ? memaux+(loop << 8)
: memmain+(loop << 8);
}
for (loop = 0xC0; loop < 0xC8; loop++)
{
const UINT uSlotOffset = (loop & 0x0f) * 0x100;
if (loop == 0xC3)
memshadow[loop] = (SW_SLOTC3ROM && SW_SLOTCXROM) ? pCxRomPeripheral+uSlotOffset // C300..C3FF - Slot 3 ROM (all 0x00's)
: pCxRomInternal+uSlotOffset; // C300..C3FF - Internal ROM
else
memshadow[loop] = SW_SLOTCXROM ? pCxRomPeripheral+uSlotOffset // C000..C7FF - SSC/Disk][/etc
: pCxRomInternal+uSlotOffset; // C000..C7FF - Internal ROM
}
for (loop = 0xC8; loop < 0xD0; loop++)
{
const UINT uRomOffset = (loop & 0x0f) * 0x100;
memshadow[loop] = pCxRomInternal+uRomOffset; // C800..CFFF - Internal ROM
}
for (loop = 0xD0; loop < 0xE0; loop++)
{
int bankoffset = (SW_BANK2 ? 0 : 0x1000);
memshadow[loop] = SW_HIGHRAM ? SW_ALTZP ? memaux+(loop << 8)-bankoffset
: memmain+(loop << 8)-bankoffset
: memrom+((loop-0xD0) * 0x100);
memwrite[loop] = SW_WRITERAM ? SW_HIGHRAM ? mem+(loop << 8)
: SW_ALTZP ? memaux+(loop << 8)-bankoffset
: memmain+(loop << 8)-bankoffset
: NULL;
}
for (loop = 0xE0; loop < 0x100; loop++)
{
memshadow[loop] = SW_HIGHRAM ? SW_ALTZP ? memaux+(loop << 8)
: memmain+(loop << 8)
: memrom+((loop-0xD0) * 0x100);
memwrite[loop] = SW_WRITERAM ? SW_HIGHRAM ? mem+(loop << 8)
: SW_ALTZP ? memaux+(loop << 8)
: memmain+(loop << 8)
: NULL;
}
if (SW_80STORE)
{
for (loop = 0x04; loop < 0x08; loop++)
{
memshadow[loop] = SW_PAGE2 ? memaux+(loop << 8)
: memmain+(loop << 8);
memwrite[loop] = mem+(loop << 8);
}
if (SW_HIRES)
{
for (loop = 0x20; loop < 0x40; loop++)
{
memshadow[loop] = SW_PAGE2 ? memaux+(loop << 8)
: memmain+(loop << 8);
memwrite[loop] = mem+(loop << 8);
}
}
}
// MOVE MEMORY BACK AND FORTH AS NECESSARY BETWEEN THE SHADOW AREAS AND
// THE MAIN RAM IMAGE TO KEEP BOTH SETS OF MEMORY CONSISTENT WITH THE NEW
// PAGING SHADOW TABLE
//
// NB. the condition 'loop <= 1' is there because:
// . Page0 (ZP) : memdirty[0] is set when the 6502 CPU does a ZP-write, but perhaps older versions didn't set this flag (eg. the asm version?).
// . Page1 (stack) : memdirty[1] is NOT set when the 6502 CPU writes to this page with JSR, etc.
for (loop = 0x00; loop < 0x100; loop++)
{
if (initialize || (oldshadow[loop] != memshadow[loop]))
{
if (!initialize &&
((*(memdirty+loop) & 1) || (loop <= 1)))
{
*(memdirty+loop) &= ~1;
CopyMemory(oldshadow[loop],mem+(loop << 8),256);
}
CopyMemory(mem+(loop << 8),memshadow[loop],256);
}
}
}
//
// ----- ALL GLOBALLY ACCESSIBLE FUNCTIONS ARE BELOW THIS LINE -----
//
//===========================================================================
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