┌───────────────∪───────────────┐
SystemVerilog ──┤ 1 16├── SKY130
Verilog ──┤ 2 15├── OpenLane
VHDL ──┤ 3 K. FATKHIDDINOV 14├── Yosys
cocotb ──┤ 4 13├── OpenROAD
Python ──┤ 5 12├── RapidWright
C ──┤ 6 DIP-16 · 2026 11├── Vivado
FPGA ──┤ 7 10├── RISC-V
DSP ──┤ 8 9├── formal
└───────────────────────────────┘
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tt-metastability-characterizer
A measuring instrument on silicon — a Tiny Tapeout chip that measures the metastability parameters of the flip-flops on its own die and streams the raw counts out over UART. Those numbers aren't in the PDK. This chip measures them. |
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An FPGA timing optimizer that prices its own compute in contest points and stops when the next second stops paying for itself. Top five at FPL'26 — solo entrant, no institutional compute, $0.34 of total LLM spend. |
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An open-source network uniting Uzbek engineers worldwide — Telegram Mini App + web app, four languages. Contributions welcome. |
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