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qemu: Refactor Cortex-M and RISC-V linkerscripts. - #19522

#19522
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qemu: Refactor Cortex-M and RISC-V linkerscripts.#19522
agatti wants to merge 3 commits into
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@agatti

@agatti agatti commented Jul 26, 2026

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Summary

This PR extracts common directives found in linkerscripts targeting Cortex-M and RISC-V processors, and modifies affected linkerscripts in order to refer to the common directives rather than replicating them (even with very little modifications).

If additional targets will be added to QEMU that use those two processor families, then these changes should help in bringing the target up faster. In the case further flexibility is needed, more fine-grained directives reuse is still a possibility as the Makefile now unconditionally uses the C preprocessor to build the final linkerscript.

Testing

The test suite passed on all affected QEMU targets, along with them being built with usermodules support in the case of Cortex-M targets.

CI should also check some of this as well.

Trade-offs and Alternatives

Due to the limited external customisability of linkerscripts, the files have to go through the C preprocessor in order to build the final linkerscript. This had the side-effect of making the Makefile a bit more complex (an explicit rule to make the output directory had to be created), but I believe that's unavoidable in order to not let the linkerscript being recreated on each build.

I left the QEMU/SABRELITE linkerscript alone as there's extra directives in the .text section that need to be further looked at to see if they can be folded into the Cortex-M shared file (in which case it will be renamed to arm-common.ld or something along those lines).

Generative AI

I did not use generative AI tools when creating this PR.

agatti added 3 commits July 26, 2026 12:53
This commit updates the QEMU port's makefile to preprocess a target's
linkerscript through the C preprocessor first.

That's required for a refactoring of the Arm Cortex-M and RISC-V
targets' linkerscripts, as the linker does not allow the level of
external customisation needed to generalise them the way it is required.

Other ports are not affected, as the preprocessor will simply pass
through its input without performing any modifications.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit extracts the parts in common across linkerscripts targeting
Cortex-M processors after being made memory section-neutral, and adapts
other linkerscripts to use the shared parts.

All Cortex-M linkerscripts ended up having the same sections duplicated
in their respective files, but with minimum changes.  With these changes
a new Cortex-M target can reuse all of the shared directives, so
bring-up time is reduced.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit extracts the parts in common across linkerscripts targeting
RISC-V processors for QEMU's VIRT target after being made register size
independent, and adapts other linkerscripts to use the shared parts.

All RISC-V linkerscripts present in this port ended up having the same
sections duplicated in their respective files, but with minimum changes.
With these changes a new RISC-V target can reuse all of the shared
directives, so bring-up time is reduced.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
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