Skip to content

Navigation Menu

Sign in
Appearance settings

Search code, repositories, users, issues, pull requests...

Provide feedback

We read every piece of feedback, and take your input very seriously.

Saved searches

Use saved searches to filter your results more quickly

Appearance settings
View karder1's full-sized avatar

Block or report karder1

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don’t include any personal information such as legal names or email addresses. Markdown is supported. This note will only be visible to you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Popular repositories Loading

  1. alu-verification alu-verification Public

    SystemVerilog self-checking verification environment for a 4-bit ALU using ModelSim

    SystemVerilog

  2. bhphat.github.io bhphat.github.io Public

    HTML

  3. openroad-gcd-rtl-to-gds openroad-gcd-rtl-to-gds Public

    RTL-to-GDSII physical design flow for the GCD design using OpenROAD-flow-scripts and Nangate45.

    Verilog

  4. openroad-counter-rtl-to-gds openroad-counter-rtl-to-gds Public

    8-bit counter RTL-to-GDSII physical design using OpenROAD-flow-scripts and Nangate45.

    Tcl

  5. openroad-alu-rtl-to-gds openroad-alu-rtl-to-gds Public

    8-bit ALU RTL-to-GDSII physical design using OpenROAD-flow-scripts and Nangate45.

    Verilog

Morty Proxy This is a proxified and sanitized view of the page, visit original site.