LEGINYORA Iban
CLUZEL Paul
This repository contains the implementation of a BLDC (Brushless Direct Current) motor controller using VHDL. The goal of this practical lab was to design a logic component capable of :
- Sequencing the three motor phases using six transistors,
- Integrating speed control via PWM,
- Managing ramp-up and ramp-down to ensure safe operation,
- Optionally supporting feedback through a Hall sensor or optical sensor.
The context of the lab focuses on controlling a BLDC motor retrieved from a hard drive, offering a safer and cost-effective platform for development and testing.
Subject.pdf: Lab manual describing the objectives, theory, and instructions for the lab work.FR_CR_bldc-controller.pdf: The report produced explains the techniques used and the results obtained. [FR version]bldc_controller.vhdl: Main VHDL component implementing the BLDC controller logic.test_bldc-controller.vhdl: Testbench for simulating and verifying the controller behavior.
To simulate and verify the behavior of the BLDC controller, a Makefile is provided to automate the compilation, elaboration, and simulation steps using GHDL and GTKWave.
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Analyze the VHDL files This step checks and compiles all VHDL files (controller and testbench):
make a
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Elaborate the testbench entity This step builds the simulation model for the testbench entity:
make e
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Run the simulation and generate the VCD waveform file This command executes the testbench and produces a
.vcdfile for waveform analysis:make r
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Visualize the simulation results with GTKWave After the simulation, you can inspect signal waveforms using GTKWave:
make run
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Clean all generated files (VCD, GHDL artifacts):
make clean-all
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Display the help information:
make help
These commands provide a convenient way to compile and test the VHDL design without manually invoking each GHDL command.
This work is inspired by content from Elektor Magazine – BLDC Beginner’s Guide, as well as lectures and guidance provided by Dr. THIBEOLT François (IRIT).