A simple full system emulator.

Easy to be used for difftest with soc-simulator.

• RISC-V

  • RV64IMACSU
  • Sv39 MMU and TLB
  • RISC-V CLINT
  • RISC-V PLIC
  • Capable of booting S-Mode SMP Linux with OpenSBI

• MIPS32

  • MIPS Release 1 support without Branch-Likely instruction
  • TLB based MMU Support
  • Capable of booting Linux and ucore-thumips

• LoongArch32(Reduced)

  • Support LoongArch32(Reduced) instruction set, except FP instructions
  • TLB based MMU Support
  • Capable of booting Linux and ucore-loongarch32

• Cache simulation support (Currently at out-of-tree cache branch)

• Xilinx UARTLite
• Serial 8250 (16550 Compatible)

All devices class is shared with soc-simulator.

See src/main.cpp and example_main folder to replace the main.

Steps to booting Linux with RISCV-CEMU