Skip to content

Navigation Menu

Sign in
Appearance settings

Search code, repositories, users, issues, pull requests...

Provide feedback

We read every piece of feedback, and take your input very seriously.

Saved searches

Use saved searches to filter your results more quickly

Appearance settings

ChaminduS/Building-a-RISC-V-CPU-Core

Open more actions menu

Folders and files

NameName
Last commit message
Last commit date

Latest commit

 

History

63 Commits
63 Commits
 
 
 
 
 
 
 
 
 
 
 
 

Repository files navigation

Building a RISC-V CPU Core

Accompanying resources for the Building a RISC-V CPU Core EdX course by Steve Hoover of Redwood EDA, Linux Foundation, and RISC-V International.

Final Core

Welcome

The repository contains all the resources provided by the Linux Foundation.

Solution code compiled by ChaminduS

In addition, the complete code required to build the RISC-V CPU Core through the Makerchip IDE is also given here. Please note that the code you find here is work of ChaminduS and it is highly encouraged that you audit the course and generate the code on your own using the guidelines provided there.

RISC-V Reference Solution

In case you get stuck, we've got your back! These reference solutions (Ctrl-click) will help with syntax, etc. without handing you the answers.

Here's a pre-built logic diagram of the final CPU. Ctrl-click here to explore in its own tab.

Happy Learning!

VIZ

About

This repository contains my work in completing the course titled "Building a RISC-V CPU Core" offered by the Linux Foundation through edX.

Topics

Resources

Stars

Watchers

Forks

Releases

Packages

Contributors

Morty Proxy This is a proxified and sanitized view of the page, visit original site.