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Noah
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Do not trust any of my speculation! I'm wrong far more than I'm right.

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38
x86_64 best way to reduce 64 bit register to 32 bit retaining zero or non-zero status
Sep 21, 2021
13
Why does a NOP (as a 5th uop) speed up a 4 uop loop on Ice Lake?
Feb 12, 2021
10
Optimize lookup tables to simple ALU
May 18, 2022
6
Why am I seeing more RFO (Read For Ownership) requests using REP MOVSB than with vmovdqa
Feb 19, 2021
6
How can memory destination BTS be significantly slower than load / BTS reg,reg / store?
Aug 14, 2020
5
Why does the act of introducing a destructor result in worse codegen? (Passed by reference instead of by value in a register)
May 15, 2023
5
Convert std::vector<uint8_t> to packed std::vector<uint64_t>
Apr 18, 2022
5
Convert __m256i register to uint64_t bitmask such that that value at each byte's value is a set bit in the output
Sep 5, 2020
5
Why does gcc use btq in conjunction with btcq when conditionally set a bit in a uint64_t * memory region
Aug 16, 2020
4
Why does a loop transitioning from having its uops fed by the Uop Cache to LSD cause a spike in branch-misses?
Apr 14, 2021

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Interpret brainfuck
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