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xNTsai/README.md

Hey πŸ‘‹ I'm Cheng-En

My name is Cheng-En Tsai and I'm a senior student majoring in Electrical Engineering at National Taiwan University (NTU)

About me

  • 🌍 I'm based in Taipei, Taiwan
  • πŸ“– I'm interested in Electronic Design Automation and Quantum Design Automation
  • πŸ‘¨β€πŸ’» I'm currently conducting research at Design Verfication Lab and Quantum Information Lab at NTU
  • πŸ–₯️ See my portfolio at MyPortfolio

πŸ“± Socials

βš’οΈ Languages & Tools

cplusplus logo python logo c logo git logo go logo matlab logo javascript logo html5 logo arduino logo raspberrypi logo nodejs logo docker logo googlecloud logo linux logo mysql logo tensorflow logo pytorch logo mongodb logo react logo

πŸ“Š Stats

stats graph languages graph

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  1. DVLab-NTU/qsyn DVLab-NTU/qsyn Public

    A C++-based growing software system for synthesizing, optimizing, and verifying quantum circuits

    C++ 193 20

  2. YCK1130/ICCAD-TBD YCK1130/ICCAD-TBD Public

    This is the a project for 2024 ICCAD contest and Final project for IEDA@NTU, TW.

    Verilog

  3. SAT-based-ATPG SAT-based-ATPG Public

    Forked from berkeley-abc/abc

    ABC: System for Sequential Logic Synthesis and Formal Verification

    C 1

  4. CA_FinalProject CA_FinalProject Public

    Computer Architecture Final project: CPU

    Verilog 1 1

  5. lin-1214/wpFinal lin-1214/wpFinal Public

    JavaScript 1

  6. YuJu0819/Embeded_sys YuJu0819/Embeded_sys Public

    C

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