Comparing changes

Choose two branches to see what’s changed or to start a new pull request. If you need to, you can also or learn more about diff comparisons.

Open a pull request

Create a new pull request by comparing changes across two branches. If you need to, you can also . Learn more about diff comparisons here.

...

Checking mergeability… Don’t worry, you can still create the pull request.

2 commits
3 files changed
1 contributor

Commits on Dec 11, 2017

Allow configuration of Ethernet PHY clock source

Refer to espressif/esp-idf#1127
The internal APLL can be used to generate the 50MHz clock for the internal EMAC and the external Ethernet PHY.
The clock can either be input on GPIO0 (as before) or output on GPIO0, GPIO16 or GPIO17 (only GPIO17 extensively tested).
New example available.

sauttefk committed Dec 11, 2017

Allow configuration of Ethernet PHY clock source

Refer to espressif/esp-idf#1127
The internal APLL can be used to generate the 50MHz clock for the internal EMAC and the external Ethernet PHY.
The clock can either be input on GPIO0 (as before) or output on GPIO0, GPIO16 or GPIO17 (only GPIO17 extensively tested).
New example available.

sauttefk committed Dec 11, 2017