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1 | 1 | diff -ruN opencv/3rdparty/openexr/IlmImf/ImfSystemSpecific.cpp opencv_patched/3rdparty/openexr/IlmImf/ImfSystemSpecific.cpp |
2 | | ---- opencv/3rdparty/openexr/IlmImf/ImfSystemSpecific.cpp 2019-08-23 08:11:43.536117200 -0400 |
3 | | -+++ opencv_patched/3rdparty/openexr/IlmImf/ImfSystemSpecific.cpp 2019-08-23 08:16:58.337879800 -0400 |
4 | | -@@ -44,11 +44,19 @@ |
| 2 | +--- opencv/3rdparty/openexr/IlmImf/ImfSystemSpecific.cpp 2019-08-25 10:40:57.596395000 -0400 |
| 3 | ++++ opencv_patched/3rdparty/openexr/IlmImf/ImfSystemSpecific.cpp 2019-08-25 10:53:15.331689900 -0400 |
| 4 | +@@ -40,21 +40,19 @@ |
| 5 | + |
| 6 | + namespace { |
| 7 | + #if defined(IMF_HAVE_SSE2) && defined(__GNUC__) && !defined(__ANDROID__) |
| 8 | +- |
| 9 | ++#include <cpuid.h> |
5 | 10 | // Helper functions for gcc + SSE enabled |
6 | | - void cpuid(int n, int &eax, int &ebx, int &ecx, int &edx) |
| 11 | +- void cpuid(int n, int &eax, int &ebx, int &ecx, int &edx) |
| 12 | ++ void cpuid(unsigned int n, unsigned int &eax, unsigned int &ebx, |
| 13 | ++ unsigned int &ecx, unsigned int &edx) |
7 | 14 | { |
8 | 15 | - __asm__ __volatile__ ( |
9 | 16 | - "cpuid" |
10 | 17 | - : /* Output */ "=a"(eax), "=b"(ebx), "=c"(ecx), "=d"(edx) |
11 | 18 | - : /* Input */ "a"(n) |
12 | 19 | - : /* Clobber */); |
13 | | -+ #ifdef __i386__ |
14 | | -+ __asm__ __volatile__ ( |
15 | | -+ "pushl %%ebx; cpuid; movl %%ebx, %0; popl %%ebx" |
16 | | -+ : /* Output */ "=m"(ebx), "=a"(eax), "=c"(ecx), "=d"(edx) |
17 | | -+ : /* Input */ "a"(n) |
18 | | -+ : /* Clobber */); |
19 | | -+ #else |
20 | | -+ __asm__ __volatile__ ( |
21 | | -+ "cpuid" |
22 | | -+ : /* Output */ "=a"(eax), "=b"(ebx), "=c"(ecx), "=d"(edx) |
23 | | -+ : /* Input */ "a"(n) |
24 | | -+ : /* Clobber */); |
25 | | -+ #endif |
| 20 | ++ __get_cpuid(n, &eax, &ebx, &ecx, &edx); |
26 | 21 | } |
27 | 22 |
|
28 | 23 | #else // IMF_HAVE_SSE2 && __GNUC__ |
| 24 | + |
| 25 | + // Helper functions for generic compiler - all disabled |
| 26 | +- void cpuid(int n, int &eax, int &ebx, int &ecx, int &edx) |
| 27 | ++ void cpuid(unsigned int n, unsigned int &eax, unsigned int &ebx, |
| 28 | ++ unsigned int &ecx, unsigned int &edx) |
| 29 | + { |
| 30 | + eax = ebx = ecx = edx = 0; |
| 31 | + } |
| 32 | +@@ -64,7 +62,7 @@ |
| 33 | + |
| 34 | + #ifdef OPENEXR_IMF_HAVE_GCC_INLINE_ASM_AVX |
| 35 | + |
| 36 | +- void xgetbv(int n, int &eax, int &edx) |
| 37 | ++ void xgetbv(unsigned int n, unsigned int &eax, unsigned int &edx) |
| 38 | + { |
| 39 | + __asm__ __volatile__ ( |
| 40 | + "xgetbv" |
| 41 | +@@ -75,7 +73,7 @@ |
| 42 | + |
| 43 | + #else // OPENEXR_IMF_HAVE_GCC_INLINE_ASM_AVX |
| 44 | + |
| 45 | +- void xgetbv(int n, int &eax, int &edx) |
| 46 | ++ void xgetbv(unsigned int n, unsigned int &eax, unsigned int &edx) |
| 47 | + { |
| 48 | + eax = edx = 0; |
| 49 | + } |
| 50 | +@@ -94,8 +92,8 @@ |
| 51 | + f16c(false) |
| 52 | + { |
| 53 | + bool osxsave = false; |
| 54 | +- int max = 0; |
| 55 | +- int eax, ebx, ecx, edx; |
| 56 | ++ unsigned int max = 0; |
| 57 | ++ unsigned int eax, ebx, ecx, edx; |
| 58 | + |
| 59 | + cpuid(0, max, ebx, ecx, edx); |
| 60 | + if (max > 0) |
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