-
Notifications
You must be signed in to change notification settings - Fork 13.6k
Issues: llvm/llvm-project
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Author
Label
Projects
Milestones
Assignee
Sort
Issues list
modulemap: add arm64 intrinsics header
backend:X86
clang:headers
Headers provided by Clang, e.g. for intrinsics
clang
Clang issues not falling into any other category
#142653
opened Jun 3, 2025 by
Steelskin
Loading…
[X86] Enable unaligned loads on x86 using cmpxchg
backend:X86
llvm:codegen
#142645
opened Jun 3, 2025 by
AZero13
Loading…
[SelectionDAG] Use reportFatalUsageError() for invalid operand bundles
backend:X86
llvm:SelectionDAG
SelectionDAGISel as well
#142613
opened Jun 3, 2025 by
nikic
Loading…
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D
backend:X86
missed-optimization
#142588
opened Jun 3, 2025 by
RKSimon
[X86][GlobalIsel] add test for fabs isel
backend:X86
#142558
opened Jun 3, 2025 by
mahesh-attarde
Loading…
[X86] 64-bit constant compiled to
movabs
+add
after branch
backend:X86
missed-optimization
#142513
opened Jun 3, 2025 by
dzaima
[X86][GlobalISel] Enable SINCOS with libcall mapping
backend:X86
llvm:globalisel
#142438
opened Jun 2, 2025 by
JaydeepChauhan14
Loading…
SHA instructions mixed with AVX degrades performance by 10x
backend:X86
performance
#142368
opened Jun 2, 2025 by
chfast
[CodeGen] Fix INLINEASM regclass numbers to match names in tests
backend:AMDGPU
backend:X86
#142359
opened Jun 2, 2025 by
jayfoad
Loading…
[X86] Cast atomic vectors in IR to support floats
backend:X86
#142320
opened Jun 1, 2025 by
jofrn
Loading…
[X86] Failure to reduce extended i64 add/sub/mul arithmetic to i32 with known zeros in the upper 32-bits
backend:X86
good first issue
https://github.com/llvm/llvm-project/contribute
missed-optimization
#142308
opened Jun 1, 2025 by
RKSimon
[X86] mtune should be generic
backend:X86
debuginfo
llvm:globalisel
#142297
opened May 31, 2025 by
AZero13
Loading…
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
backend:AArch64
backend:AMDGPU
backend:ARM
backend:Hexagon
backend:PowerPC
backend:SystemZ
backend:WebAssembly
backend:X86
clang
Clang issues not falling into any other category
debuginfo
mc
Machine (object) code
#142289
opened May 31, 2025 by
MaskRay
Loading…
[AtomicExpandPass] Match isIdempotentRMW with InstcombineRMW
backend:X86
llvm:codegen
llvm:instcombine
llvm:transforms
#142277
opened May 31, 2025 by
AZero13
Loading…
[X86][APX] Exclusively emit setzucc to avoid false dependency
backend:X86
#142092
opened May 30, 2025 by
fzou1
Loading…
[CodeGen][AArch64] ptrauth intrinsic to safely construct relative ptr
backend:AArch64
backend:X86
clang:codegen
IR generation bugs: mangling, exceptions, etc.
clang:frontend
Language frontend issues, e.g. anything involving "Sema"
clang:headers
Headers provided by Clang, e.g. for intrinsics
clang
Clang issues not falling into any other category
llvm:ir
llvm:transforms
#142047
opened May 29, 2025 by
AbhayKanhere
Loading…
[X86] Use GFNI for LZCNT vXi8 ops
backend:X86
#141888
opened May 29, 2025 by
houngkoungting
Loading…
CodeGenPrepare, X86: Support sinking phi nodes.
backend:X86
llvm:ir
llvm:transforms
#141716
opened May 28, 2025 by
pcc
Loading…
Make constant vector
<i64 poison, i64 -9223372036854775808>
able to reuse <i64 0, i64 -9223372036854775808>
backend:X86
#141706
opened May 28, 2025 by
Validark
[CostModel] Add a DstTy to getShuffleCost
backend:AArch64
backend:AMDGPU
backend:ARM
backend:Hexagon
backend:PowerPC
backend:RISC-V
backend:SystemZ
backend:X86
llvm:analysis
llvm:transforms
vectorizers
#141634
opened May 27, 2025 by
davemgreen
Loading…
[NFC][TableGen] clang-format tweaks in X86RecognizableInstr.cpp
backend:X86
tablegen
#141615
opened May 27, 2025 by
jurahul
Loading…
[X86][GlobalISel] Support fp80 for G_FPTRUNC and G_FPEXT
backend:X86
llvm:globalisel
#141611
opened May 27, 2025 by
e-kud
Loading…
[DAG] Fold (and X, (add (not Y), Z)) -> (and X, (not (sub Y, Z))).
backend:AArch64
backend:loongarch
backend:X86
llvm:SelectionDAG
SelectionDAGISel as well
#141476
opened May 26, 2025 by
simonzgx
Loading…
[X86][NFC] Use std::move to avoid copy
backend:X86
#141455
opened May 26, 2025 by
abhishek-kaushik22
Loading…
[X86] SelectionDAGISel as well
missed-optimization
const << (x&7)
doesn't use shlx
when BMI2 is available
backend:X86
llvm:SelectionDAG
#141347
opened May 24, 2025 by
dzaima
Previous Next
ProTip!
Updated in the last three days: updated:>2025-05-31.