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Description
lldb/test/API/tools/lldb-server/main.cpp defines the following trap code for aarch64:
145 #elif defined(__aarch64__)
-> 146 asm volatile("brk #0xf000");However, this seems to deadloop LLDB. E.g.:
$ ./bin/lldb lldb-test-build.noindex/tools/lldb-server/TestGdbRemoteFork.test_c_child_llgs/a.out trap
(lldb) target create "lldb-test-build.noindex/tools/lldb-server/TestGdbRemoteFork.test_c_child_llgs/a.out"
Current executable set to '/home/mgorny/llvm-project/build/lldb-test-build.noindex/tools/lldb-server/TestGdbRemoteFork.test_c_child_llgs/a.out' (aarch64).
(lldb) settings set -- target.run-args "trap"
(lldb) run
Process 2869341 launched: '/home/mgorny/llvm-project/build/lldb-test-build.noindex/tools/lldb-server/TestGdbRemoteFork.test_c_child_llgs/a.out' (aarch64)
Process 2869341 stopped
* thread #1, name = 'a.out', stop reason = signal SIGTRAP
frame #0: 0x0000aaaaaaaa4124 a.out`trap() at main.cpp:146:3
143 #if defined(__x86_64__) || defined(__i386__)
144 asm volatile("int3");
145 #elif defined(__aarch64__)
-> 146 asm volatile("brk #0xf000");
147 #elif defined(__arm__)
148 asm volatile("udf #254");
149 #elif defined(__powerpc__)
(lldb) cont
Process 2869341 resuming
Process 2869341 stopped
* thread #1, name = 'a.out', stop reason = signal SIGTRAP
frame #0: 0x0000aaaaaaaa4124 a.out`trap() at main.cpp:146:3
143 #if defined(__x86_64__) || defined(__i386__)
144 asm volatile("int3");
145 #elif defined(__aarch64__)
-> 146 asm volatile("brk #0xf000");
147 #elif defined(__arm__)
148 asm volatile("udf #254");
149 #elif defined(__powerpc__)and so on.