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Commit dc2032f

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jofrnjofrn
committed
[AtomicExpand] Add bitcasts when expanding load atomic vector
AtomicExpand fails for aligned `load atomic <n x T>` because it does not find a compatible library call. This change adds appropriate bitcasts so that the call can be lowered. commit-id:f430c1af
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3 files changed

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‎llvm/lib/CodeGen/AtomicExpandPass.cpp

Copy file name to clipboardExpand all lines: llvm/lib/CodeGen/AtomicExpandPass.cpp
+19-3Lines changed: 19 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2060,9 +2060,25 @@ bool AtomicExpandImpl::expandAtomicOpToLibcall(
20602060
I->replaceAllUsesWith(V);
20612061
} else if (HasResult) {
20622062
Value *V;
2063-
if (UseSizedLibcall)
2064-
V = Builder.CreateBitOrPointerCast(Result, I->getType());
2065-
else {
2063+
if (UseSizedLibcall) {
2064+
// Add bitcasts from Result's T scalar type to I's <2 x T/2> vector type
2065+
if (I->getType()->getScalarType()->isIntOrPtrTy() && I->getType()->isVectorTy() &&
2066+
!Result->getType()->isVectorTy()) {
2067+
TypeSize Size = Result->getType()->getPrimitiveSizeInBits();
2068+
assert((unsigned)Size % 2 == 0);
2069+
unsigned HalfSize = (unsigned)Size / 2;
2070+
Value *Lo = Builder.CreateTrunc(Result, IntegerType::get(Ctx, HalfSize));
2071+
Value *RS = Builder.CreateLShr(Result, ConstantInt::get(IntegerType::get(Ctx, Size), HalfSize));
2072+
Value *Hi = Builder.CreateTrunc(RS, IntegerType::get(Ctx, HalfSize));
2073+
Value *Vec = Builder.CreateInsertElement(
2074+
VectorType::get(IntegerType::get(Ctx, HalfSize), cast<VectorType>(I->getType())->getElementCount()),
2075+
Lo, ConstantInt::get(IntegerType::get(Ctx, 32), 0));
2076+
Vec = Builder.CreateInsertElement(Vec, Hi, ConstantInt::get(IntegerType::get(Ctx, 32), 1));
2077+
V = Builder.CreateBitOrPointerCast(Vec, I->getType());
2078+
}
2079+
else
2080+
V = Builder.CreateBitOrPointerCast(Result, I->getType());
2081+
} else {
20662082
V = Builder.CreateAlignedLoad(I->getType(), AllocaResult,
20672083
AllocaAlignment);
20682084
Builder.CreateLifetimeEnd(AllocaResult, SizeVal64);

‎llvm/test/CodeGen/ARM/atomic-load-store.ll

Copy file name to clipboardExpand all lines: llvm/test/CodeGen/ARM/atomic-load-store.ll
+54Lines changed: 54 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -983,3 +983,57 @@ define void @store_atomic_f64__seq_cst(ptr %ptr, double %val1) {
983983
store atomic double %val1, ptr %ptr seq_cst, align 8
984984
ret void
985985
}
986+
987+
define <1 x ptr> @atomic_vec1_ptr(ptr %x) #0 {
988+
; ARM-LABEL: atomic_vec1_ptr:
989+
; ARM: @ %bb.0:
990+
; ARM-NEXT: ldr r0, [r0]
991+
; ARM-NEXT: dmb ish
992+
; ARM-NEXT: bx lr
993+
;
994+
; ARMOPTNONE-LABEL: atomic_vec1_ptr:
995+
; ARMOPTNONE: @ %bb.0:
996+
; ARMOPTNONE-NEXT: ldr r0, [r0]
997+
; ARMOPTNONE-NEXT: dmb ish
998+
; ARMOPTNONE-NEXT: bx lr
999+
;
1000+
; THUMBTWO-LABEL: atomic_vec1_ptr:
1001+
; THUMBTWO: @ %bb.0:
1002+
; THUMBTWO-NEXT: ldr r0, [r0]
1003+
; THUMBTWO-NEXT: dmb ish
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; THUMBTWO-NEXT: bx lr
1005+
;
1006+
; THUMBONE-LABEL: atomic_vec1_ptr:
1007+
; THUMBONE: @ %bb.0:
1008+
; THUMBONE-NEXT: push {r7, lr}
1009+
; THUMBONE-NEXT: movs r1, #0
1010+
; THUMBONE-NEXT: mov r2, r1
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; THUMBONE-NEXT: bl __sync_val_compare_and_swap_4
1012+
; THUMBONE-NEXT: pop {r7, pc}
1013+
;
1014+
; ARMV4-LABEL: atomic_vec1_ptr:
1015+
; ARMV4: @ %bb.0:
1016+
; ARMV4-NEXT: push {r11, lr}
1017+
; ARMV4-NEXT: mov r1, #2
1018+
; ARMV4-NEXT: bl __atomic_load_4
1019+
; ARMV4-NEXT: mov r1, #255
1020+
; ARMV4-NEXT: orr r1, r1, #65280
1021+
; ARMV4-NEXT: and r0, r0, r1
1022+
; ARMV4-NEXT: pop {r11, lr}
1023+
; ARMV4-NEXT: mov pc, lr
1024+
;
1025+
; ARMV6-LABEL: atomic_vec1_ptr:
1026+
; ARMV6: @ %bb.0:
1027+
; ARMV6-NEXT: ldr r0, [r0]
1028+
; ARMV6-NEXT: mov r1, #0
1029+
; ARMV6-NEXT: mcr p15, #0, r1, c7, c10, #5
1030+
; ARMV6-NEXT: bx lr
1031+
;
1032+
; THUMBM-LABEL: atomic_vec1_ptr:
1033+
; THUMBM: @ %bb.0:
1034+
; THUMBM-NEXT: ldr r0, [r0]
1035+
; THUMBM-NEXT: dmb sy
1036+
; THUMBM-NEXT: bx lr
1037+
%ret = load atomic <1 x ptr>, ptr %x acquire, align 4
1038+
ret <1 x ptr> %ret
1039+
}

‎llvm/test/CodeGen/X86/atomic-load-store.ll

Copy file name to clipboardExpand all lines: llvm/test/CodeGen/X86/atomic-load-store.ll
+15Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -354,6 +354,21 @@ define <2 x i32> @atomic_vec2_i32(ptr %x) nounwind {
354354
ret <2 x i32> %ret
355355
}
356356

357+
define <2 x ptr> @atomic_vec2_ptr_align(ptr %x) nounwind {
358+
; CHECK-LABEL: atomic_vec2_ptr_align:
359+
; CHECK: ## %bb.0:
360+
; CHECK-NEXT: pushq %rax
361+
; CHECK-NEXT: movl $2, %esi
362+
; CHECK-NEXT: callq ___atomic_load_16
363+
; CHECK-NEXT: movq %rdx, %xmm1
364+
; CHECK-NEXT: movq %rax, %xmm0
365+
; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
366+
; CHECK-NEXT: popq %rax
367+
; CHECK-NEXT: retq
368+
%ret = load atomic <2 x ptr>, ptr %x acquire, align 16
369+
ret <2 x ptr> %ret
370+
}
371+
357372
define <4 x float> @atomic_vec4_float_align(ptr %x) nounwind {
358373
; CHECK-LABEL: atomic_vec4_float_align:
359374
; CHECK: ## %bb.0:

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