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Commit 7935c3d

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EbinJose2002EbinJose2002
committed
- Moved the function to SPIRVUtils.cpp
- Added Documentation
1 parent f87e8bd commit 7935c3d
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6 files changed

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‎llvm/docs/SPIRVUsage.rst

Copy file name to clipboardExpand all lines: llvm/docs/SPIRVUsage.rst
+2Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -213,6 +213,8 @@ list of supported SPIR-V extensions, sorted alphabetically by their extension na
213213
- Adds a bitwise instruction on three operands and a look-up table index for specifying the bitwise operation to perform.
214214
* - ``SPV_INTEL_subgroup_matrix_multiply_accumulate``
215215
- Adds an instruction to compute the matrix product of an M x K matrix with a K x N matrix and then add an M x N matrix.
216+
* - ``SPV_INTEL_cluster_attributes``
217+
- Adds decorations to indicate the cluster attributes of a function.
216218

217219
To enable multiple extensions, list them separated by comma. For example, to enable support for atomic operations on floating-point numbers and arbitrary precision integers, use:
218220

‎llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp

Copy file name to clipboardExpand all lines: llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
+21-49Lines changed: 21 additions & 49 deletions
Original file line numberDiff line numberDiff line change
@@ -1980,62 +1980,32 @@ static void handleMIFlagDecoration(MachineInstr &I, const SPIRVSubtarget &ST,
19801980
buildOpDecorate(DstReg, I, TII, SPIRV::Decoration::FPFastMathMode, {FMFlags});
19811981
}
19821982

1983-
static std::vector<uint32_t>
1984-
getMetaDataValues(std::vector<llvm::MDNode *> &MetaDataList) {
1985-
std::vector<uint32_t> res;
1986-
for (auto metaDataNode : MetaDataList) {
1987-
if (metaDataNode->getNumOperands() > 0) {
1988-
if (auto *CMD = llvm::dyn_cast<llvm::ConstantAsMetadata>(
1989-
metaDataNode->getOperand(0))) {
1990-
if (auto *CI = llvm::dyn_cast<llvm::ConstantInt>(CMD->getValue())) {
1991-
APInt val = CI->getValue();
1992-
int64_t decVal = val.getZExtValue();
1993-
res.push_back(decVal);
1994-
}
1995-
}
1996-
}
1997-
}
1998-
return res;
1999-
}
2000-
2001-
static void handleFunctionDecoration(llvm::Module::const_iterator F,
1983+
static void handleFunctionDecoration(MachineInstr &MI, const SPIRVSubtarget &ST,
20021984
const SPIRVInstrInfo &TII,
2003-
MachineModuleInfo *MMI,
2004-
const SPIRVSubtarget &ST) {
2005-
MachineFunction *MF = MMI->getMachineFunction(*F);
2006-
Register FuncReg;
2007-
MachineInstr *FirstInstr = nullptr;
1985+
SPIRV::ModuleAnalysisInfo &MAI,
1986+
llvm::Module::const_iterator F) {
1987+
Register FuncReg = MI.getOperand(0).getReg();
20081988
llvm::SmallVector<std::pair<unsigned int, llvm::MDNode *>> MetaDataList;
2009-
// Find function register and first instruction
2010-
for (auto &MBB : *MF) {
2011-
for (auto &MI : MBB) {
2012-
if (MI.getOpcode() == SPIRV::OpFunction) {
2013-
FirstInstr = &MI;
2014-
FuncReg = MI.getOperand(0).getReg();
2015-
break;
2016-
}
2017-
}
2018-
if (FuncReg.isValid() && FirstInstr)
2019-
break;
2020-
}
1989+
20211990
// Add function-level decorations based on metadata
20221991
F->getAllMetadata(MetaDataList);
20231992
for (auto &MetaData : MetaDataList) {
20241993
if (MetaData.second == F->getMetadata("stall_enable") ||
20251994
MetaData.second == F->getMetadata("stall_free")) {
20261995
if (ST.canUseExtension(
20271996
SPIRV::Extension::SPV_INTEL_fpga_cluster_attributes)) {
2028-
std::vector<llvm::MDNode *> MetaDataVector;
1997+
llvm::SmallVector<llvm::MDNode *> MetaDataVector;
20291998
MetaDataVector.push_back(MetaData.second);
2030-
std::vector<uint32_t> params = getMetaDataValues(MetaDataVector);
2031-
if (params.at(0) == 1) {
2032-
if (MetaData.second == F->getMetadata("stall_enable")) {
2033-
buildOpDecorate(FuncReg, *FirstInstr, TII,
1999+
llvm::SmallVector<uint32_t> params =
2000+
getConstantFromMetadata(MetaDataVector);
2001+
2002+
if (params[0] == 1) {
2003+
if (MetaData.second == F->getMetadata("stall_enable"))
2004+
buildOpDecorate(FuncReg, MI, TII,
20342005
SPIRV::Decoration::StallEnableINTEL, {});
2035-
} else {
2036-
buildOpDecorate(FuncReg, *FirstInstr, TII,
2037-
SPIRV::Decoration::StallFreeINTEL, {});
2038-
}
2006+
else
2007+
buildOpDecorate(FuncReg, MI, TII, SPIRV::Decoration::StallFreeINTEL,
2008+
{});
20392009
}
20402010
}
20412011
}
@@ -2050,11 +2020,13 @@ static void addDecorations(const Module &M, const SPIRVInstrInfo &TII,
20502020
MachineFunction *MF = MMI->getMachineFunction(*F);
20512021
if (!MF)
20522022
continue;
2053-
for (auto &MBB : *MF)
2054-
for (auto &MI : MBB)
2023+
for (auto &MBB : *MF) {
2024+
for (auto &MI : MBB) {
20552025
handleMIFlagDecoration(MI, ST, TII, MAI.Reqs);
2056-
2057-
handleFunctionDecoration(F, TII, MMI, ST);
2026+
if (MI.getOpcode() == SPIRV::OpFunction)
2027+
handleFunctionDecoration(MI, ST, TII, MAI, F);
2028+
}
2029+
}
20582030
}
20592031
}
20602032

‎llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td

Copy file name to clipboardExpand all lines: llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
+2-2Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -518,7 +518,7 @@ defm FPMaxErrorINTEL : CapabilityOperand<6169, 0, 0, [SPV_INTEL_fp_max_error], [
518518
defm TernaryBitwiseFunctionINTEL : CapabilityOperand<6241, 0, 0, [SPV_INTEL_ternary_bitwise_function], []>;
519519
defm SubgroupMatrixMultiplyAccumulateINTEL : CapabilityOperand<6236, 0, 0, [SPV_INTEL_subgroup_matrix_multiply_accumulate], []>;
520520
defm FPGAClusterAttributesINTEL : CapabilityOperand<5904, 0, 0, [SPV_INTEL_fpga_cluster_attributes], []>;
521-
defm FPGAClusterAttributesV2INTEL : CapabilityOperand<6150, 0, 0, [SPV_INTEL_fpga_cluster_attributes], []>;
521+
defm FPGAClusterAttributesV2INTEL : CapabilityOperand<6150, 0, 0, [SPV_INTEL_fpga_cluster_attributes], []>;
522522

523523
//===----------------------------------------------------------------------===//
524524
// Multiclass used to define SourceLanguage enum values and at the same time
@@ -1271,7 +1271,7 @@ defm AliasScopeINTEL : DecorationOperand<5914, 0, 0, [], [MemoryAccessAliasingIN
12711271
defm NoAliasINTEL : DecorationOperand<5915, 0, 0, [], [MemoryAccessAliasingINTEL]>;
12721272
defm FPMaxErrorDecorationINTEL : DecorationOperand<6170, 0, 0, [], [FPMaxErrorINTEL]>;
12731273
defm StallEnableINTEL : DecorationOperand<5905, 0, 0, [SPV_INTEL_fpga_cluster_attributes], [FPGAClusterAttributesINTEL]>;
1274-
defm StallFreeINTEL : DecorationOperand<6151, 0, 0, [SPV_INTEL_fpga_cluster_attributes], [FPGAClusterAttributesV2INTEL]>;
1274+
defm StallFreeINTEL : DecorationOperand<6151, 0, 0, [SPV_INTEL_fpga_cluster_attributes], [FPGAClusterAttributesV2INTEL]>;
12751275

12761276
//===----------------------------------------------------------------------===//
12771277
// Multiclass used to define BuiltIn enum values and at the same time

‎llvm/lib/Target/SPIRV/SPIRVUtils.cpp

Copy file name to clipboardExpand all lines: llvm/lib/Target/SPIRV/SPIRVUtils.cpp
+18Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -370,6 +370,24 @@ Type *getMDOperandAsType(const MDNode *N, unsigned I) {
370370
return toTypedPointer(ElementTy);
371371
}
372372

373+
llvm::SmallVector<uint32_t>
374+
getConstantFromMetadata(llvm::SmallVector<llvm::MDNode *> &MetaDataList) {
375+
llvm::SmallVector<uint32_t> res;
376+
for (auto metaDataNode : MetaDataList) {
377+
if (metaDataNode->getNumOperands() > 0) {
378+
if (auto *CMD = llvm::dyn_cast<llvm::ConstantAsMetadata>(
379+
metaDataNode->getOperand(0))) {
380+
if (auto *CI = llvm::dyn_cast<llvm::ConstantInt>(CMD->getValue())) {
381+
APInt val = CI->getValue();
382+
int64_t decVal = val.getZExtValue();
383+
res.push_back(decVal);
384+
}
385+
}
386+
}
387+
}
388+
return res;
389+
}
390+
373391
// The set of names is borrowed from the SPIR-V translator.
374392
// TODO: may be implemented in SPIRVBuiltins.td.
375393
static bool isPipeOrAddressSpaceCastBI(const StringRef MangledName) {

‎llvm/lib/Target/SPIRV/SPIRVUtils.h

Copy file name to clipboardExpand all lines: llvm/lib/Target/SPIRV/SPIRVUtils.h
+4Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -243,6 +243,10 @@ bool isSpvIntrinsic(const Value *Arg);
243243
// Get type of i-th operand of the metadata node.
244244
Type *getMDOperandAsType(const MDNode *N, unsigned I);
245245

246+
// Extract the constant value from the metadata node.
247+
llvm::SmallVector<uint32_t>
248+
getConstantFromMetadata(llvm::SmallVector<llvm::MDNode *> &MetaDataList);
249+
246250
// If OpenCL or SPIR-V builtin function name is recognized, return a demangled
247251
// name, otherwise return an empty string.
248252
std::string getOclOrSpirvBuiltinDemangledName(StringRef Name);

‎llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_cluster_attributes/cluster_attributes.ll

Copy file name to clipboard
+11-11Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1,22 +1,22 @@
11
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_INTEL_fpga_cluster_attributes %s -o - | FileCheck %s
22

3-
; CHECK-DAG: OpCapability FPGAClusterAttributesINTEL
4-
; CHECK-DAG: OpCapability FPGAClusterAttributesV2INTEL
5-
; CHECK-DAG: OpExtension "SPV_INTEL_fpga_cluster_attributes"
6-
; CHECK-DAG: OpDecorate %[[#STALLENABLE_DEC:]] StallEnableINTEL
7-
; CHECK-DAG: OpDecorate %[[#STALLFREE_DEC:]] StallFreeINTEL
8-
; CHECK: %[[#STALLENABLE_DEC]] = OpFunction %[[#]] None %[[#]]
9-
; CHECK: %[[#STALLFREE_DEC]] = OpFunction %[[#]] None %[[#]]
3+
; CHECK-DAG: OpCapability FPGAClusterAttributesINTEL
4+
; CHECK-DAG: OpCapability FPGAClusterAttributesV2INTEL
5+
; CHECK-DAG: OpExtension "SPV_INTEL_fpga_cluster_attributes"
6+
; CHECK-DAG: OpDecorate %[[#STALLENABLE_DEC:]] StallEnableINTEL
7+
; CHECK-DAG: OpDecorate %[[#STALLFREE_DEC:]] StallFreeINTEL
8+
; CHECK: %[[#STALLENABLE_DEC]] = OpFunction %[[#]] None %[[#]]
9+
; CHECK: %[[#STALLFREE_DEC]] = OpFunction %[[#]] None %[[#]]
1010

1111
define spir_func void @test_fpga_stallenable_attr() !stall_enable !0 {
1212
entry:
1313
ret void
14-
}
14+
}
1515

1616
define spir_func void @test_fpga_stallfree_attr() !stall_free !1 {
1717
entry:
1818
ret void
19-
}
19+
}
2020

21-
!0 = !{ i32 1 }
22-
!1 = !{ i32 1 }
21+
!0 = !{ i32 1 }
22+
!1 = !{ i32 1 }

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