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Commit 50ddc14

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Add to convert-gpu-to-rocdl
1 parent 6dbfe0b commit 50ddc14
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‎mlir/include/mlir/Conversion/Passes.td

Copy file name to clipboardExpand all lines: mlir/include/mlir/Conversion/Passes.td
+2-1Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -601,6 +601,7 @@ def ConvertGpuOpsToROCDLOps : Pass<"convert-gpu-to-rocdl", "gpu::GPUModuleOp"> {
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let constructor = "mlir::createLowerGpuOpsToROCDLOpsPass()";
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let dependentDialects = [
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"ROCDL::ROCDLDialect",
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"amdgpu::AMDGPUDialect",
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"cf::ControlFlowDialect",
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"memref::MemRefDialect",
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];
@@ -1415,7 +1416,7 @@ def ConvertVectorToLLVMPass : Pass<"convert-vector-to-llvm"> {
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"bool", /*default=*/"false",
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"Use the preferred alignment of a vector type in load/store "
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"operations instead of the alignment of the element type of the "
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"memref. This flag is intended for use with hardware which requires"
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"memref. This flag is intended for use with hardware which requires"
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"vector alignment, or in application contexts where it is known all "
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"vector access are naturally aligned. ">,
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Option<"amx", "enable-amx",

‎mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp

Copy file name to clipboardExpand all lines: mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
+2Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -27,6 +27,7 @@
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#include "mlir/Conversion/LLVMCommon/TypeConverter.h"
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#include "mlir/Conversion/MathToLLVM/MathToLLVM.h"
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#include "mlir/Conversion/MathToROCDL/MathToROCDL.h"
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#include "mlir/Dialect/AMDGPU/IR/AMDGPUDialect.h"
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#include "mlir/Dialect/ControlFlow/IR/ControlFlow.h"
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#include "mlir/Dialect/Func/IR/FuncOps.h"
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#include "mlir/Dialect/GPU/IR/GPUDialect.h"
@@ -318,6 +319,7 @@ struct LowerGpuOpsToROCDLOpsPass final
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{
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RewritePatternSet patterns(ctx);
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populateGpuRewritePatterns(patterns);
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populateGpuPromoteShuffleToAMDGPUPatterns(patterns);
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(void)applyPatternsGreedily(m, std::move(patterns));
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}
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