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Commit 17bac1c

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rampitecrampitec
committed
[AMDGPU] Simplify getIns64. NFCI.
This big switch is unmaintainable and buggy. In particular it unconditionally adds clamp if there is omod to VOP3.
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‎llvm/lib/Target/AMDGPU/SIInstrInfo.td

Copy file name to clipboardExpand all lines: llvm/lib/Target/AMDGPU/SIInstrInfo.td
+19-75Lines changed: 19 additions & 75 deletions
Original file line numberDiff line numberDiff line change
@@ -1972,81 +1972,25 @@ class getIns64 <RegisterOperand Src0RC, RegisterOperand Src1RC,
19721972
RegisterOperand Src2RC, int NumSrcArgs,
19731973
bit HasClamp, bit HasModifiers, bit HasSrc2Mods, bit HasOMod,
19741974
Operand Src0Mod, Operand Src1Mod, Operand Src2Mod> {
1975-
1976-
dag ret =
1977-
!if (!eq(NumSrcArgs, 0),
1978-
// VOP1 without input operands (V_NOP, V_CLREXCP)
1979-
(ins),
1980-
/* else */
1981-
!if (!eq(NumSrcArgs, 1),
1982-
!if (HasModifiers,
1983-
// VOP1 with modifiers
1984-
!if(HasOMod,
1985-
(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
1986-
Clamp0:$clamp, omod0:$omod),
1987-
!if (HasClamp,
1988-
(ins Src0Mod:$src0_modifiers, Src0RC:$src0, Clamp0:$clamp),
1989-
(ins Src0Mod:$src0_modifiers, Src0RC:$src0)))
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/* else */,
1991-
// VOP1 without modifiers
1992-
!if(HasOMod,
1993-
(ins Src0RC:$src0, Clamp0:$clamp, omod0:$omod),
1994-
!if (HasClamp,
1995-
(ins Src0RC:$src0, Clamp0:$clamp),
1996-
(ins Src0RC:$src0)))
1997-
/* endif */ ),
1998-
!if (!eq(NumSrcArgs, 2),
1999-
!if (HasModifiers,
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// VOP 2 with modifiers
2001-
!if(HasOMod,
2002-
(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
2003-
Src1Mod:$src1_modifiers, Src1RC:$src1,
2004-
Clamp0:$clamp, omod0:$omod),
2005-
!con((ins Src0Mod:$src0_modifiers, Src0RC:$src0,
2006-
Src1Mod:$src1_modifiers, Src1RC:$src1),
2007-
!if(HasClamp, (ins Clamp0:$clamp), (ins))))
2008-
/* else */,
2009-
// VOP2 without modifiers
2010-
!if (HasClamp,
2011-
(ins Src0RC:$src0, Src1RC:$src1, Clamp0:$clamp),
2012-
(ins Src0RC:$src0, Src1RC:$src1))
2013-
2014-
/* endif */ )
2015-
/* NumSrcArgs == 3 */,
2016-
!if (HasModifiers,
2017-
!if (HasSrc2Mods,
2018-
// VOP3 with modifiers
2019-
!if (HasOMod,
2020-
(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
2021-
Src1Mod:$src1_modifiers, Src1RC:$src1,
2022-
Src2Mod:$src2_modifiers, Src2RC:$src2,
2023-
Clamp0:$clamp, omod0:$omod),
2024-
!if (HasClamp,
2025-
(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
2026-
Src1Mod:$src1_modifiers, Src1RC:$src1,
2027-
Src2Mod:$src2_modifiers, Src2RC:$src2,
2028-
Clamp0:$clamp),
2029-
(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
2030-
Src1Mod:$src1_modifiers, Src1RC:$src1,
2031-
Src2Mod:$src2_modifiers, Src2RC:$src2))),
2032-
// VOP3 with modifiers except src2
2033-
!if (HasOMod,
2034-
(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
2035-
Src1Mod:$src1_modifiers, Src1RC:$src1,
2036-
Src2RC:$src2, Clamp0:$clamp, omod0:$omod),
2037-
!if (HasClamp,
2038-
(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
2039-
Src1Mod:$src1_modifiers, Src1RC:$src1,
2040-
Src2RC:$src2, Clamp0:$clamp),
2041-
(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
2042-
Src1Mod:$src1_modifiers, Src1RC:$src1,
2043-
Src2RC:$src2))))
2044-
/* else */,
2045-
// VOP3 without modifiers
2046-
!if (HasClamp,
2047-
(ins Src0RC:$src0, Src1RC:$src1, Src2RC:$src2, Clamp0:$clamp),
2048-
(ins Src0RC:$src0, Src1RC:$src1, Src2RC:$src2))
2049-
/* endif */ ))));
1975+
dag src0 = !if(!ge(NumSrcArgs, 1),
1976+
!if (HasModifiers,
1977+
(ins Src0Mod:$src0_modifiers, Src0RC:$src0),
1978+
(ins Src0RC:$src0)),
1979+
(ins));
1980+
dag src1 = !if(!ge(NumSrcArgs, 2),
1981+
!if (HasModifiers,
1982+
(ins Src1Mod:$src1_modifiers, Src1RC:$src1),
1983+
(ins Src1RC:$src1)),
1984+
(ins));
1985+
dag src2 = !if(!ge(NumSrcArgs, 3),
1986+
!if (HasSrc2Mods,
1987+
(ins Src2Mod:$src2_modifiers, Src2RC:$src2),
1988+
(ins Src2RC:$src2)),
1989+
(ins));
1990+
dag clamp = !if(HasClamp, (ins Clamp0:$clamp), (ins));
1991+
dag omod = !if(HasOMod, (ins omod0:$omod), (ins));
1992+
1993+
dag ret = !con(src0, src1, src2, clamp, omod);
20501994
}
20511995

20521996
class getInsVOP3Base<RegisterOperand Src0RC, RegisterOperand Src1RC,

‎llvm/lib/Target/AMDGPU/VOP2Instructions.td

Copy file name to clipboardExpand all lines: llvm/lib/Target/AMDGPU/VOP2Instructions.td
+2-2Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -439,7 +439,7 @@ class VOP_MAC <ValueType vt0, ValueType vt1=vt0> : VOPProfile <[vt0, vt1, vt1, v
439439
// Src2 must accept the same operand types as vdst, namely VGPRs only
440440
let Src2RC64 = getVOP3VRegForVT<Src2VT, IsTrue16, !not(IsRealTrue16)>.ret;
441441
let Ins64 = getIns64<Src0RC64, Src1RC64, Src2RC64, 3,
442-
0, HasModifiers, HasModifiers, HasOMod,
442+
HasClamp, HasModifiers, HasModifiers, HasOMod,
443443
Src0Mod, Src1Mod, Src2Mod>.ret;
444444
let InsDPP = (ins Src0ModDPP:$src0_modifiers, Src0DPP:$src0,
445445
Src1ModDPP:$src1_modifiers, Src1DPP:$src1,
@@ -448,7 +448,7 @@ class VOP_MAC <ValueType vt0, ValueType vt1=vt0> : VOPProfile <[vt0, vt1, vt1, v
448448
DppBankMask:$bank_mask, DppBoundCtrl:$bound_ctrl);
449449
let InsDPP16 = !con(InsDPP, (ins Dpp16FI:$fi));
450450
let InsVOP3Base = getInsVOP3Base<Src0VOP3DPP, Src1VOP3DPP, RegisterOperand<VGPR_32>, 3,
451-
0, HasModifiers, HasModifiers, HasOMod,
451+
HasClamp, HasModifiers, HasModifiers, HasOMod,
452452
Src0ModVOP3DPP, Src1ModVOP3DPP, Src2Mod, HasOpSel>.ret;
453453
// We need a dummy src2 tied to dst to track the use of that register for s_delay_alu
454454
let InsVOPDX = (ins Src0RC32:$src0X, Src1RC32:$vsrc1X, VGPRSrc_32:$src2X);

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