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diff --git a/‎cores/esp8266/core_esp8266_waveform.cpp
Copy file name to clipboardExpand all lines: cores/esp8266/core_esp8266_waveform.cpp
+40-40Lines changed: 40 additions & 40 deletions b/‎cores/esp8266/core_esp8266_waveform.cpp
Copy file name to clipboardExpand all lines: cores/esp8266/core_esp8266_waveform.cpp
+40-40Lines changed: 40 additions & 40 deletions
@@ -90,8 +90,8 @@ namespace {
     volatile uint32_t enabled = 0; // Is it actively running, updated in NMI so no access outside the NMI code
 
     // Enable lock-free by only allowing updates to waveform.states and waveform.enabled from IRQ service routine
-    volatile uint32_t toEnable = 0;  // Message to the NMI handler to start exactly one waveform on a inactive pin
-    volatile uint32_t toDisable = 0; // Message to the NMI handler to disable exactly one pin from waveform generation
+    volatile int32_t toSet = -1;     // Message to the NMI handler to start/modify exactly one waveform
+    volatile int32_t toDisable = -1; // Message to the NMI handler to disable exactly one pin from waveform generation
 
     uint32_t(*timer1CB)() = nullptr;
 
@@ -180,7 +180,7 @@ int startWaveformClockCycles(uint8_t pin, uint32_t highCcys, uint32_t lowCcys,
       }
     }
     std::atomic_thread_fence(std::memory_order_release);
-    waveform.toEnable = 1UL << pin;
+    waveform.toSet = pin;
     if (!waveform.timer1Running) {
       initTimer();
       timer1_write(microsecondsToClockCycles(1));
@@ -189,20 +189,20 @@ int startWaveformClockCycles(uint8_t pin, uint32_t highCcys, uint32_t lowCcys,
       // Must not interfere if Timer is due shortly, cluster phases to reduce interrupt load
       timer1_write(microsecondsToClockCycles(1));
     }
-    while (waveform.toEnable) {
-      delay(0); // Wait for waveform to update
-    }
   }
   else {
     wave.mode = WaveformMode::INFINITE; // turn off possible expiry to make update atomic from NMI
     std::atomic_thread_fence(std::memory_order_release);
     wave.expiryCcy = runTimeCcys; // in WaveformMode::UPDATEEXPIRY, temporarily hold relative cycle count
-    std::atomic_thread_fence(std::memory_order_release);
     if (runTimeCcys) {
       wave.mode = WaveformMode::UPDATEEXPIRY;
       std::atomic_thread_fence(std::memory_order_release);
+      waveform.toSet = pin;
     }
   }
+  while (waveform.toSet >= 0) {
+      delay(0); // Wait for waveform to update
+  }
   return true;
 }
 
@@ -215,12 +215,12 @@ int ICACHE_RAM_ATTR stopWaveform(uint8_t pin) {
   // If user sends in a pin >16 but <32, this will always point to a 0 bit
   // If they send >=32, then the shift will result in 0 and it will also return false
   if (waveform.enabled & (1UL << pin)) {
-    waveform.toDisable = 1UL << pin;
+    waveform.toDisable = pin;
     // Must not interfere if Timer is due shortly
     if (T1L > IRQLATENCY + DELTAIRQ) {
       timer1_write(microsecondsToClockCycles(1));
     }
-    while (waveform.toDisable) {
+    while (waveform.toDisable >= 0) {
       /* no-op */ // Can't delay() since stopWaveform may be called from an IRQ
     }
   }
@@ -242,21 +242,45 @@ static ICACHE_RAM_ATTR void timer1Interrupt() {
   static int nextPin = 0;
 
   const uint32_t isrStartCcy = ESP.getCycleCount();
-
-  if (waveform.toEnable || waveform.toDisable) {
+  const uint32_t toSetMask = waveform.toSet >= 0 ? 1UL << waveform.toSet : 0;
+  const uint32_t toDisableMask = waveform.toDisable >= 0 ? 1UL << waveform.toDisable : 0;
+  if ((toSetMask && !(waveform.enabled & toSetMask)) || toDisableMask) {
     // Handle enable/disable requests from main app.
-    waveform.enabled = (waveform.enabled & ~waveform.toDisable) | waveform.toEnable; // Set the requested waveforms on/off
-    waveform.toEnable = 0;
-    waveform.toDisable = 0;
+    waveform.enabled = (waveform.enabled & ~toDisableMask) | toSetMask; // Set the requested waveforms on/off
     // Find the first GPIO being generated by checking GCC's find-first-set (returns 1 + the bit of the first 1 in an int32_t)
     startPin = __builtin_ffs(waveform.enabled) - 1;
     // Find the last bit by subtracting off GCC's count-leading-zeros (no offset in this one)
     endPin = 32 - __builtin_clz(waveform.enabled);
+    waveform.toDisable = -1;
+  }
+
+  uint32_t now = ESP.getCycleCount();
+
+  if (toSetMask) {
+    Waveform& wave = waveform.pins[waveform.toSet];
+    switch (wave.mode) {
+    case WaveformMode::INIT:
+      waveform.states &= ~toSetMask; // Clear the state of any just started
+      wave.nextPeriodCcy = (wave.alignPhase >= 0 && waveform.enabled & (1UL << wave.alignPhase)) ?
+        waveform.pins[wave.alignPhase].nextPeriodCcy + wave.nextPeriodCcy : now;
+      wave.nextEventCcy = wave.nextPeriodCcy;
+      if (!wave.expiryCcy) {
+        wave.mode = WaveformMode::INFINITE;
+        break;
+      }
+      // fall through
+    case WaveformMode::UPDATEEXPIRY:
+      wave.expiryCcy += wave.nextPeriodCcy; // in WaveformMode::UPDATEEXPIRY, expiryCcy temporarily holds relative CPU cycle count
+      wave.mode = WaveformMode::EXPIRES;
+      break;
+    default:
+      break;
+    }
+    waveform.toSet = -1;
   }
 
   // Exit the loop if the next event, if any, is sufficiently distant.
   const uint32_t isrTimeoutCcy = isrStartCcy + ISRTIMEOUTCCYS;
-  uint32_t now = ESP.getCycleCount();
   uint32_t nextTimerCcy;
   bool busy = waveform.enabled;
   if (!busy) {
@@ -265,7 +289,6 @@ static ICACHE_RAM_ATTR void timer1Interrupt() {
   else if (!(waveform.enabled & (1UL << nextPin))) {
     nextPin = startPin;
   }
-  bool initPins = true;
   while (busy) {
     nextTimerCcy = now + MAXIRQCCYS;
     int stopPin = nextPin;
@@ -277,28 +300,6 @@ static ICACHE_RAM_ATTR void timer1Interrupt() {
 
       Waveform& wave = waveform.pins[pin];
 
-      if (initPins) {
-        switch (wave.mode) {
-        case WaveformMode::INIT:
-          waveform.states &= ~(1UL << pin); // Clear the state of any just started
-          wave.nextPeriodCcy = (waveform.enabled & (1UL << wave.alignPhase)) ?
-            waveform.pins[wave.alignPhase].nextPeriodCcy + wave.nextPeriodCcy : now;
-          wave.nextEventCcy = wave.nextPeriodCcy;
-          if (!wave.expiryCcy) {
-            wave.mode = WaveformMode::INFINITE;
-            break;
-          }
-          // fall through
-        case WaveformMode::UPDATEEXPIRY:
-          wave.expiryCcy += wave.nextPeriodCcy; // in WaveformMode::UPDATEEXPIRY, expiryCcy temporarily holds relative CPU cycle count
-          wave.mode = WaveformMode::EXPIRES;
-          initPins = false; // only one pin per IRQ
-          break;
-        default:
-          break;
-        }
-      }
-
       int32_t overshootCcys = now - wave.nextEventCcy;
       if (overshootCcys >= 0) {
         if (WaveformMode::EXPIRES == wave.mode && wave.nextEventCcy == wave.expiryCcy) {
@@ -328,7 +329,7 @@ static ICACHE_RAM_ATTR void timer1Interrupt() {
               // preceeding period had zero idle cycle, continue direct into new duty cycle
               if (fwdPeriods) {
                 wave.nextPeriodCcy += fwdPeriods * wave.periodCcys;
-              	// adapt expiry such that it occurs during intended cycle
+                // adapt expiry such that it occurs during intended cycle
                 if (WaveformMode::EXPIRES == wave.mode)
                   wave.expiryCcy += fwdPeriods * wave.periodCcys;
               }
@@ -391,7 +392,6 @@ static ICACHE_RAM_ATTR void timer1Interrupt() {
 
     } while ((pin = (pin < endPin) ? pin + 1 : startPin, pin != stopPin));
 
-    initPins = false;
     now = ESP.getCycleCount();
     const int32_t timerMarginCcys = isrTimeoutCcy - nextTimerCcy;
     busy = timerMarginCcys > 0;