Update read/written registers for x86 conditional jump instructions #2798
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Detailed description
This adds semantics for the instruction pointer that is read and written by all jump instructions.
Test plan
Tests are included.
I was hoping not to have to make more big PRs, but the branch instructions are fundamental to how Dyninst works; getting their semantics correct is critical. I have attached the script I used to parse this information directly from the SDM text.
The non-conditional instructions will be added in a separate PR to keep this one from being even bigger than it is.
parse_x86_jcc.tar.gz