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Commit 77e7fa5

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Tinyu-ZhaoTinyu-Zhao
authored
Create Stamp-S3 pins_arduino.h and Stamp-S3 Board (espressif#7892)
* m5stack_stamp_s3/pins_arduino.h * add stamp-s3
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‎boards.txt

Copy file name to clipboardExpand all lines: boards.txt
+192Lines changed: 192 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12118,6 +12118,198 @@ m5stack-coreink.menu.EraseFlash.all.upload.erase_cmd=-e
1211812118

1211912119
##############################################################
1212012120

12121+
stamp-s3.name=STAMP-S3
12122+
stamp-s3.vid.0=0x303a
12123+
stamp-s3.pid.0=0x1001
12124+
12125+
stamp-s3.bootloader.tool=esptool_py
12126+
stamp-s3.bootloader.tool.default=esptool_py
12127+
12128+
stamp-s3.upload.tool=esptool_py
12129+
stamp-s3.upload.tool.default=esptool_py
12130+
stamp-s3.upload.tool.network=esp_ota
12131+
12132+
stamp-s3.upload.maximum_size=1310720
12133+
stamp-s3.upload.maximum_data_size=327680
12134+
stamp-s3.upload.flags=
12135+
stamp-s3.upload.extra_flags=
12136+
stamp-s3.upload.use_1200bps_touch=false
12137+
stamp-s3.upload.wait_for_upload_port=false
12138+
12139+
stamp-s3.serial.disableDTR=false
12140+
stamp-s3.serial.disableRTS=false
12141+
12142+
stamp-s3.build.tarch=xtensa
12143+
stamp-s3.build.bootloader_addr=0x0
12144+
stamp-s3.build.target=esp32s3
12145+
stamp-s3.build.mcu=esp32s3
12146+
stamp-s3.build.core=esp32
12147+
stamp-s3.build.variant=m5stack_stamp_s3
12148+
stamp-s3.build.board=STAMP_S3
12149+
12150+
stamp-s3.build.usb_mode=1
12151+
stamp-s3.build.cdc_on_boot=0
12152+
stamp-s3.build.msc_on_boot=0
12153+
stamp-s3.build.dfu_on_boot=0
12154+
stamp-s3.build.f_cpu=240000000L
12155+
stamp-s3.build.flash_size=4MB
12156+
stamp-s3.build.flash_freq=80m
12157+
stamp-s3.build.flash_mode=dio
12158+
stamp-s3.build.boot=qio
12159+
stamp-s3.build.boot_freq=80m
12160+
stamp-s3.build.partitions=default
12161+
stamp-s3.build.defines=
12162+
stamp-s3.build.loop_core=
12163+
stamp-s3.build.event_core=
12164+
stamp-s3.build.psram_type=qspi
12165+
stamp-s3.build.memory_type={build.boot}_{build.psram_type}
12166+
12167+
stamp-s3.menu.JTAGAdapter.default=Disabled
12168+
stamp-s3.menu.JTAGAdapter.default.build.copy_jtag_files=0
12169+
stamp-s3.menu.JTAGAdapter.builtin=Integrated USB JTAG
12170+
stamp-s3.menu.JTAGAdapter.builtin.build.openocdscript=esp32s3-builtin.cfg
12171+
stamp-s3.menu.JTAGAdapter.builtin.build.copy_jtag_files=1
12172+
stamp-s3.menu.JTAGAdapter.external=FTDI Adapter
12173+
stamp-s3.menu.JTAGAdapter.external.build.openocdscript=esp32s3-ftdi.cfg
12174+
stamp-s3.menu.JTAGAdapter.external.build.copy_jtag_files=1
12175+
stamp-s3.menu.JTAGAdapter.bridge=ESP USB Bridge
12176+
stamp-s3.menu.JTAGAdapter.bridge.build.openocdscript=esp32s3-bridge.cfg
12177+
stamp-s3.menu.JTAGAdapter.bridge.build.copy_jtag_files=1
12178+
12179+
stamp-s3.menu.PSRAM.disabled=Disabled
12180+
stamp-s3.menu.PSRAM.disabled.build.defines=
12181+
stamp-s3.menu.PSRAM.disabled.build.psram_type=qspi
12182+
stamp-s3.menu.PSRAM.enabled=QSPI PSRAM
12183+
stamp-s3.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM
12184+
stamp-s3.menu.PSRAM.enabled.build.psram_type=qspi
12185+
stamp-s3.menu.PSRAM.opi=OPI PSRAM
12186+
stamp-s3.menu.PSRAM.opi.build.defines=-DBOARD_HAS_PSRAM
12187+
stamp-s3.menu.PSRAM.opi.build.psram_type=opi
12188+
12189+
stamp-s3.menu.FlashMode.qio=QIO 80MHz
12190+
stamp-s3.menu.FlashMode.qio.build.flash_mode=dio
12191+
stamp-s3.menu.FlashMode.qio.build.boot=qio
12192+
stamp-s3.menu.FlashMode.qio.build.boot_freq=80m
12193+
stamp-s3.menu.FlashMode.qio.build.flash_freq=80m
12194+
stamp-s3.menu.FlashMode.qio120=QIO 120MHz
12195+
stamp-s3.menu.FlashMode.qio120.build.flash_mode=dio
12196+
stamp-s3.menu.FlashMode.qio120.build.boot=qio
12197+
stamp-s3.menu.FlashMode.qio120.build.boot_freq=120m
12198+
stamp-s3.menu.FlashMode.qio120.build.flash_freq=80m
12199+
stamp-s3.menu.FlashMode.dio=DIO 80MHz
12200+
stamp-s3.menu.FlashMode.dio.build.flash_mode=dio
12201+
stamp-s3.menu.FlashMode.dio.build.boot=dio
12202+
stamp-s3.menu.FlashMode.dio.build.boot_freq=80m
12203+
stamp-s3.menu.FlashMode.dio.build.flash_freq=80m
12204+
stamp-s3.menu.FlashMode.opi=OPI 80MHz
12205+
stamp-s3.menu.FlashMode.opi.build.flash_mode=dout
12206+
stamp-s3.menu.FlashMode.opi.build.boot=opi
12207+
stamp-s3.menu.FlashMode.opi.build.boot_freq=80m
12208+
stamp-s3.menu.FlashMode.opi.build.flash_freq=80m
12209+
12210+
stamp-s3.menu.FlashSize.4M=4MB (32Mb)
12211+
stamp-s3.menu.FlashSize.4M.build.flash_size=4MB
12212+
stamp-s3.menu.FlashSize.8M=8MB (64Mb)
12213+
stamp-s3.menu.FlashSize.8M.build.flash_size=8MB
12214+
stamp-s3.menu.FlashSize.8M.build.partitions=default_8MB
12215+
stamp-s3.menu.FlashSize.16M=16MB (128Mb)
12216+
stamp-s3.menu.FlashSize.16M.build.flash_size=16MB
12217+
#stamp-s3.menu.FlashSize.32M=32MB (256Mb)
12218+
#stamp-s3.menu.FlashSize.32M.build.flash_size=32MB
12219+
12220+
stamp-s3.menu.LoopCore.1=Core 1
12221+
stamp-s3.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1
12222+
stamp-s3.menu.LoopCore.0=Core 0
12223+
stamp-s3.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0
12224+
12225+
stamp-s3.menu.EventsCore.1=Core 1
12226+
stamp-s3.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
12227+
stamp-s3.menu.EventsCore.0=Core 0
12228+
stamp-s3.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0
12229+
12230+
stamp-s3.menu.USBMode.hwcdc=Hardware CDC and JTAG
12231+
stamp-s3.menu.USBMode.hwcdc.build.usb_mode=1
12232+
stamp-s3.menu.USBMode.default=USB-OTG (TinyUSB)
12233+
stamp-s3.menu.USBMode.default.build.usb_mode=0
12234+
12235+
stamp-s3.menu.CDCOnBoot.default=Disabled
12236+
stamp-s3.menu.CDCOnBoot.default.build.cdc_on_boot=0
12237+
stamp-s3.menu.CDCOnBoot.cdc=Enabled
12238+
stamp-s3.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
12239+
12240+
stamp-s3.menu.MSCOnBoot.default=Disabled
12241+
stamp-s3.menu.MSCOnBoot.default.build.msc_on_boot=0
12242+
stamp-s3.menu.MSCOnBoot.msc=Enabled (Requires USB-OTG Mode)
12243+
stamp-s3.menu.MSCOnBoot.msc.build.msc_on_boot=1
12244+
12245+
stamp-s3.menu.DFUOnBoot.default=Disabled
12246+
stamp-s3.menu.DFUOnBoot.default.build.dfu_on_boot=0
12247+
stamp-s3.menu.DFUOnBoot.dfu=Enabled (Requires USB-OTG Mode)
12248+
stamp-s3.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
12249+
12250+
stamp-s3.menu.UploadMode.default=UART0 / Hardware CDC
12251+
stamp-s3.menu.UploadMode.default.upload.use_1200bps_touch=false
12252+
stamp-s3.menu.UploadMode.default.upload.wait_for_upload_port=false
12253+
stamp-s3.menu.UploadMode.cdc=USB-OTG CDC (TinyUSB)
12254+
stamp-s3.menu.UploadMode.cdc.upload.use_1200bps_touch=true
12255+
stamp-s3.menu.UploadMode.cdc.upload.wait_for_upload_port=true
12256+
12257+
stamp-s3.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
12258+
stamp-s3.menu.PartitionScheme.default.build.partitions=default
12259+
stamp-s3.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
12260+
stamp-s3.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
12261+
stamp-s3.menu.PartitionScheme.default_8MB=8M with spiffs (3MB APP/1.5MB SPIFFS)
12262+
stamp-s3.menu.PartitionScheme.default_8MB.build.partitions=default_8MB
12263+
stamp-s3.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336
12264+
12265+
stamp-s3.menu.CPUFreq.240=240MHz (WiFi)
12266+
stamp-s3.menu.CPUFreq.240.build.f_cpu=240000000L
12267+
stamp-s3.menu.CPUFreq.160=160MHz (WiFi)
12268+
stamp-s3.menu.CPUFreq.160.build.f_cpu=160000000L
12269+
stamp-s3.menu.CPUFreq.80=80MHz (WiFi)
12270+
stamp-s3.menu.CPUFreq.80.build.f_cpu=80000000L
12271+
stamp-s3.menu.CPUFreq.40=40MHz
12272+
stamp-s3.menu.CPUFreq.40.build.f_cpu=40000000L
12273+
stamp-s3.menu.CPUFreq.20=20MHz
12274+
stamp-s3.menu.CPUFreq.20.build.f_cpu=20000000L
12275+
stamp-s3.menu.CPUFreq.10=10MHz
12276+
stamp-s3.menu.CPUFreq.10.build.f_cpu=10000000L
12277+
12278+
stamp-s3.menu.UploadSpeed.921600=921600
12279+
stamp-s3.menu.UploadSpeed.921600.upload.speed=921600
12280+
stamp-s3.menu.UploadSpeed.115200=115200
12281+
stamp-s3.menu.UploadSpeed.115200.upload.speed=115200
12282+
stamp-s3.menu.UploadSpeed.256000.windows=256000
12283+
stamp-s3.menu.UploadSpeed.256000.upload.speed=256000
12284+
stamp-s3.menu.UploadSpeed.230400.windows.upload.speed=256000
12285+
stamp-s3.menu.UploadSpeed.230400=230400
12286+
stamp-s3.menu.UploadSpeed.230400.upload.speed=230400
12287+
stamp-s3.menu.UploadSpeed.460800.linux=460800
12288+
stamp-s3.menu.UploadSpeed.460800.macosx=460800
12289+
stamp-s3.menu.UploadSpeed.460800.upload.speed=460800
12290+
stamp-s3.menu.UploadSpeed.512000.windows=512000
12291+
stamp-s3.menu.UploadSpeed.512000.upload.speed=512000
12292+
12293+
stamp-s3.menu.DebugLevel.none=None
12294+
stamp-s3.menu.DebugLevel.none.build.code_debug=0
12295+
stamp-s3.menu.DebugLevel.error=Error
12296+
stamp-s3.menu.DebugLevel.error.build.code_debug=1
12297+
stamp-s3.menu.DebugLevel.warn=Warn
12298+
stamp-s3.menu.DebugLevel.warn.build.code_debug=2
12299+
stamp-s3.menu.DebugLevel.info=Info
12300+
stamp-s3.menu.DebugLevel.info.build.code_debug=3
12301+
stamp-s3.menu.DebugLevel.debug=Debug
12302+
stamp-s3.menu.DebugLevel.debug.build.code_debug=4
12303+
stamp-s3.menu.DebugLevel.verbose=Verbose
12304+
stamp-s3.menu.DebugLevel.verbose.build.code_debug=5
12305+
12306+
stamp-s3.menu.EraseFlash.none=Disabled
12307+
stamp-s3.menu.EraseFlash.none.upload.erase_cmd=
12308+
stamp-s3.menu.EraseFlash.all=Enabled
12309+
stamp-s3.menu.EraseFlash.all.upload.erase_cmd=-e
12310+
12311+
##############################################################
12312+
1212112313
odroid_esp32.name=ODROID ESP32
1212212314

1212312315
odroid_esp32.bootloader.tool=esptool_py

‎variants/m5stack_stamp_s3/pins_arduino.h

Copy file name to clipboard
+55Lines changed: 55 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,55 @@
1+
#ifndef Pins_Arduino_h
2+
#define Pins_Arduino_h
3+
4+
#include <stdint.h>
5+
#include "soc/soc_caps.h"
6+
7+
#define USB_VID 0x303a
8+
#define USB_PID 0x1001
9+
10+
#define EXTERNAL_NUM_INTERRUPTS 23
11+
#define NUM_DIGITAL_PINS 46
12+
#define NUM_ANALOG_INPUTS 15
13+
14+
#define analogInputToDigitalPin(p) \
15+
(((p) < 20) ? (analogChannelToDigitalPin(p)) : -1)
16+
#define digitalPinToInterrupt(p) (((p) < 48) ? (p) : -1)
17+
#define digitalPinHasPWM(p) (p < 46)
18+
19+
static const uint8_t TX = 43;
20+
static const uint8_t RX = 44;
21+
22+
static const uint8_t TXD2 = 1;
23+
static const uint8_t RXD2 = 2;
24+
25+
static const uint8_t SDA = 13;
26+
static const uint8_t SCL = 15;
27+
28+
static const uint8_t G0 = 0;
29+
static const uint8_t G1 = 1;
30+
static const uint8_t G2 = 2;
31+
static const uint8_t G3 = 3;
32+
static const uint8_t G4 = 4;
33+
static const uint8_t G5 = 5;
34+
static const uint8_t G6 = 6;
35+
static const uint8_t G7 = 7;
36+
static const uint8_t G8 = 8;
37+
static const uint8_t G9 = 9;
38+
static const uint8_t G10 = 10;
39+
static const uint8_t G11 = 11;
40+
static const uint8_t G12 = 12;
41+
static const uint8_t G13 = 13;
42+
static const uint8_t G14 = 14;
43+
static const uint8_t G15 = 15;
44+
static const uint8_t G39 = 39;
45+
static const uint8_t G40 = 40;
46+
static const uint8_t G41 = 41;
47+
static const uint8_t G42 = 42;
48+
static const uint8_t G43 = 43;
49+
static const uint8_t G44 = 44;
50+
static const uint8_t G46 = 46;
51+
52+
static const uint8_t ADC1 = 7;
53+
static const uint8_t ADC2 = 8;
54+
55+
#endif /* Pins_Arduino_h */

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