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1. lowRISC/opentitan lowRISC/opentitan Public

   OpenTitan: Open source silicon root of trust

   SystemVerilog 3.4k 1k

2. lowRISC/ibex lowRISC/ibex Public

   Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

   SystemVerilog 1.9k 731

3. pulp-platform/axi pulp-platform/axi Public

   AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

   SystemVerilog 1.6k 354

4. pulp-platform/hero pulp-platform/hero Public archive

   Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and an application-class host CPU, including full-stack software …

   SystemVerilog 115 29