I am currently using the STM32N657 on the NUCLEO-N657X0-Q board to drive an 800×480 pixel display with 24-bit color.
The display that I am using is the NHD-7.0-800480EF-ASXV#-T. I’m using the built-in LTDC controller on the chip. I do know that the controller is working because the entire screen is black, the screen would be showing the backlight if it wasn’t. The problem is that I am unable to display anything at all when writing to the screen buffer.
Here are the configuration parameters that I am using based on the data sheet:
Here are the layer settings that I am using:
Here is the clock configuration for the LTDC:
Here is the code that I am running:
#include "main_application.h"
__attribute__((section(".screen_buffer")))
uint8_t screen_buffer[FRAME_BUFFER_SIZE];
void main_app(hal_pointers_t hal_pointers){
for (uint32_t i = 0; i < FRAME_BUFFER_SIZE; i++){
screen_buffer[i] = 0;
}
HAL_LTDC_SetAddress(hal_pointers.hltdc, (uint32_t) screen_buffer, 0);
//HAL_LTDC_ReloadLayer(hal_pointers.hltdc, LTDC_RELOAD_IMMEDIATE, 0);
//HAL_LTDC_SetOutputDisplay(hal_pointers.hltdc, LTDC_OUT_RGB);
//Make a square
for (uint32_t i = 0; i < FRAME_BUFFER_SIZE/3; i++){
//for (uint32_t j = 0; j < 20; j++){
//screen_buffer[(i*3) + (j*SCREEN_WIDTH*3)] = 255;
screen_buffer[i*3] = 0x55;
//}
}
while(1){
}
}
Here is what I’ve observed:
I have run the code in debug mode and can see data being written at the screen buffer location
I’ve hooked up a logic analyzer to the red data pins, HSYNC, VSYNC, DE, and DCLK (below is a snapshot). When the red data pins are not active HSYNC seems to be acting somewhat normally. When the data pins are active, HSYNC does not act normal at all. It pulses almost randomly. Please note that the logic analyzer is a cheap one from Amazon, so it may not even be reading this data correctly.
Here's what I’ve tried:
I’ve tried using the following HAL functions:
HAL_LTDC_ReloadLayer(hal_pointers.hltdc, LTDC_RELOAD_IMMEDIATE, 0)
,HAL_LTDC_SetOutputDisplay(hal_pointers.hltdc, LTDC_OUT_RGB)
.
No change.
I’ve tried slightly adjusting the pulse width settings for both HSYNC and VSYNC. No change.
Let me know if I’ve forgotten to provide any information.