| 1 | /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */ |
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| 2 | /* |
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| 3 | * Copyright (C) 2021 Intel Corporation |
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| 4 | * Author: Johannes Berg <johannes@sipsolutions.net> |
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| 5 | */ |
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| 6 | #ifndef _UAPI_LINUX_VIRTIO_PCIDEV_H |
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| 7 | #define _UAPI_LINUX_VIRTIO_PCIDEV_H |
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| 8 | #include <linux/types.h> |
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| 9 | |
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| 10 | /** |
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| 11 | * enum virtio_pcidev_ops - virtual PCI device operations |
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| 12 | * @VIRTIO_PCIDEV_OP_RESERVED: reserved to catch errors |
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| 13 | * @VIRTIO_PCIDEV_OP_CFG_READ: read config space, size is 1, 2, 4 or 8; |
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| 14 | * the @data field should be filled in by the device (in little endian). |
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| 15 | * @VIRTIO_PCIDEV_OP_CFG_WRITE: write config space, size is 1, 2, 4 or 8; |
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| 16 | * the @data field contains the data to write (in little endian). |
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| 17 | * @VIRTIO_PCIDEV_OP_MMIO_READ: read BAR mem/pio, size can be variable; |
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| 18 | * the @data field should be filled in by the device (in little endian). |
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| 19 | * @VIRTIO_PCIDEV_OP_MMIO_WRITE: write BAR mem/pio, size can be variable; |
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| 20 | * the @data field contains the data to write (in little endian). |
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| 21 | * @VIRTIO_PCIDEV_OP_MMIO_MEMSET: memset MMIO, size is variable but |
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| 22 | * the @data field only has one byte (unlike @VIRTIO_PCIDEV_OP_MMIO_WRITE) |
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| 23 | * @VIRTIO_PCIDEV_OP_INT: legacy INTx# pin interrupt, the addr field is 1-4 for |
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| 24 | * the number |
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| 25 | * @VIRTIO_PCIDEV_OP_MSI: MSI(-X) interrupt, this message basically transports |
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| 26 | * the 16- or 32-bit write that would otherwise be done into memory, |
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| 27 | * analogous to the write messages (@VIRTIO_PCIDEV_OP_MMIO_WRITE) above |
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| 28 | * @VIRTIO_PCIDEV_OP_PME: Dummy message whose content is ignored (and should be |
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| 29 | * all zeroes) to signal the PME# pin. |
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| 30 | */ |
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| 31 | enum virtio_pcidev_ops { |
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| 32 | VIRTIO_PCIDEV_OP_RESERVED = 0, |
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| 33 | VIRTIO_PCIDEV_OP_CFG_READ, |
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| 34 | VIRTIO_PCIDEV_OP_CFG_WRITE, |
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| 35 | VIRTIO_PCIDEV_OP_MMIO_READ, |
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| 36 | VIRTIO_PCIDEV_OP_MMIO_WRITE, |
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| 37 | VIRTIO_PCIDEV_OP_MMIO_MEMSET, |
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| 38 | VIRTIO_PCIDEV_OP_INT, |
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| 39 | VIRTIO_PCIDEV_OP_MSI, |
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| 40 | VIRTIO_PCIDEV_OP_PME, |
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| 41 | }; |
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| 42 | |
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| 43 | /** |
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| 44 | * struct virtio_pcidev_msg - virtio PCI device operation |
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| 45 | * @op: the operation to do |
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| 46 | * @bar: the bar (only with BAR read/write messages) |
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| 47 | * @reserved: reserved |
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| 48 | * @size: the size of the read/write (in bytes) |
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| 49 | * @addr: the address to read/write |
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| 50 | * @data: the data, normally @size long, but just one byte for |
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| 51 | * %VIRTIO_PCIDEV_OP_MMIO_MEMSET |
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| 52 | * |
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| 53 | * Note: the fields are all in native (CPU) endian, however, the |
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| 54 | * @data values will often be in little endian (see the ops above.) |
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| 55 | */ |
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| 56 | struct virtio_pcidev_msg { |
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| 57 | __u8 op; |
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| 58 | __u8 bar; |
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| 59 | __u16 reserved; |
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| 60 | __u32 size; |
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| 61 | __u64 addr; |
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| 62 | __u8 data[]; |
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| 63 | }; |
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| 64 | |
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| 65 | #endif /* _UAPI_LINUX_VIRTIO_PCIDEV_H */ |
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| 66 | |
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