| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | /* |
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| 3 | * Common LiteX header providing |
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| 4 | * helper functions for accessing CSRs. |
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| 5 | * |
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| 6 | * Copyright (C) 2019-2020 Antmicro <www.antmicro.com> |
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| 7 | */ |
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| 8 | |
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| 9 | #ifndef _LINUX_LITEX_H |
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| 10 | #define _LINUX_LITEX_H |
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| 11 | |
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| 12 | #include <linux/io.h> |
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| 13 | |
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| 14 | static inline void _write_litex_subregister(u32 val, void __iomem *addr) |
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| 15 | { |
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| 16 | writel(val: (u32 __force)cpu_to_le32(val), addr); |
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| 17 | } |
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| 18 | |
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| 19 | static inline u32 _read_litex_subregister(void __iomem *addr) |
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| 20 | { |
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| 21 | return le32_to_cpu((__le32 __force)readl(addr)); |
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| 22 | } |
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| 23 | |
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| 24 | /* |
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| 25 | * LiteX SoC Generator, depending on the configuration, can split a single |
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| 26 | * logical CSR (Control&Status Register) into a series of consecutive physical |
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| 27 | * registers. |
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| 28 | * |
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| 29 | * For example, in the configuration with 8-bit CSR Bus, a 32-bit aligned, |
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| 30 | * 32-bit wide logical CSR will be laid out as four 32-bit physical |
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| 31 | * subregisters, each one containing one byte of meaningful data. |
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| 32 | * |
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| 33 | * For Linux support, upstream LiteX enforces a 32-bit wide CSR bus, which |
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| 34 | * means that only larger-than-32-bit CSRs will be split across multiple |
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| 35 | * subregisters (e.g., a 64-bit CSR will be spread across two consecutive |
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| 36 | * 32-bit subregisters). |
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| 37 | * |
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| 38 | * For details see: https://github.com/enjoy-digital/litex/wiki/CSR-Bus |
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| 39 | */ |
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| 40 | |
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| 41 | static inline void litex_write8(void __iomem *reg, u8 val) |
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| 42 | { |
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| 43 | _write_litex_subregister(val, addr: reg); |
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| 44 | } |
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| 45 | |
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| 46 | static inline void litex_write16(void __iomem *reg, u16 val) |
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| 47 | { |
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| 48 | _write_litex_subregister(val, addr: reg); |
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| 49 | } |
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| 50 | |
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| 51 | static inline void litex_write32(void __iomem *reg, u32 val) |
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| 52 | { |
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| 53 | _write_litex_subregister(val, addr: reg); |
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| 54 | } |
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| 55 | |
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| 56 | static inline void litex_write64(void __iomem *reg, u64 val) |
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| 57 | { |
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| 58 | _write_litex_subregister(val: val >> 32, addr: reg); |
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| 59 | _write_litex_subregister(val, addr: reg + 4); |
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| 60 | } |
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| 61 | |
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| 62 | static inline u8 litex_read8(void __iomem *reg) |
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| 63 | { |
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| 64 | return _read_litex_subregister(addr: reg); |
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| 65 | } |
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| 66 | |
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| 67 | static inline u16 litex_read16(void __iomem *reg) |
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| 68 | { |
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| 69 | return _read_litex_subregister(addr: reg); |
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| 70 | } |
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| 71 | |
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| 72 | static inline u32 litex_read32(void __iomem *reg) |
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| 73 | { |
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| 74 | return _read_litex_subregister(addr: reg); |
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| 75 | } |
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| 76 | |
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| 77 | static inline u64 litex_read64(void __iomem *reg) |
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| 78 | { |
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| 79 | return ((u64)_read_litex_subregister(addr: reg) << 32) | |
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| 80 | _read_litex_subregister(addr: reg + 4); |
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| 81 | } |
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| 82 | |
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| 83 | #endif /* _LINUX_LITEX_H */ |
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| 84 | |
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