| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | #ifndef __IO_PGTABLE_H |
| 3 | #define __IO_PGTABLE_H |
| 4 | |
| 5 | #include <linux/bitops.h> |
| 6 | #include <linux/iommu.h> |
| 7 | |
| 8 | /* |
| 9 | * Public API for use by IOMMU drivers |
| 10 | */ |
| 11 | enum io_pgtable_fmt { |
| 12 | ARM_32_LPAE_S1, |
| 13 | ARM_32_LPAE_S2, |
| 14 | ARM_64_LPAE_S1, |
| 15 | ARM_64_LPAE_S2, |
| 16 | ARM_V7S, |
| 17 | ARM_MALI_LPAE, |
| 18 | AMD_IOMMU_V1, |
| 19 | AMD_IOMMU_V2, |
| 20 | APPLE_DART, |
| 21 | APPLE_DART2, |
| 22 | IO_PGTABLE_NUM_FMTS, |
| 23 | }; |
| 24 | |
| 25 | /** |
| 26 | * struct iommu_flush_ops - IOMMU callbacks for TLB and page table management. |
| 27 | * |
| 28 | * @tlb_flush_all: Synchronously invalidate the entire TLB context. |
| 29 | * @tlb_flush_walk: Synchronously invalidate all intermediate TLB state |
| 30 | * (sometimes referred to as the "walk cache") for a virtual |
| 31 | * address range. |
| 32 | * @tlb_add_page: Optional callback to queue up leaf TLB invalidation for a |
| 33 | * single page. IOMMUs that cannot batch TLB invalidation |
| 34 | * operations efficiently will typically issue them here, but |
| 35 | * others may decide to update the iommu_iotlb_gather structure |
| 36 | * and defer the invalidation until iommu_iotlb_sync() instead. |
| 37 | * |
| 38 | * Note that these can all be called in atomic context and must therefore |
| 39 | * not block. |
| 40 | */ |
| 41 | struct iommu_flush_ops { |
| 42 | void (*tlb_flush_all)(void *cookie); |
| 43 | void (*tlb_flush_walk)(unsigned long iova, size_t size, size_t granule, |
| 44 | void *cookie); |
| 45 | void (*tlb_add_page)(struct iommu_iotlb_gather *gather, |
| 46 | unsigned long iova, size_t granule, void *cookie); |
| 47 | }; |
| 48 | |
| 49 | /** |
| 50 | * struct io_pgtable_cfg - Configuration data for a set of page tables. |
| 51 | * |
| 52 | * @quirks: A bitmap of hardware quirks that require some special |
| 53 | * action by the low-level page table allocator. |
| 54 | * @pgsize_bitmap: A bitmap of page sizes supported by this set of page |
| 55 | * tables. |
| 56 | * @ias: Input address (iova) size, in bits. |
| 57 | * @oas: Output address (paddr) size, in bits. |
| 58 | * @coherent_walk A flag to indicate whether or not page table walks made |
| 59 | * by the IOMMU are coherent with the CPU caches. |
| 60 | * @tlb: TLB management callbacks for this set of tables. |
| 61 | * @iommu_dev: The device representing the DMA configuration for the |
| 62 | * page table walker. |
| 63 | */ |
| 64 | struct io_pgtable_cfg { |
| 65 | /* |
| 66 | * IO_PGTABLE_QUIRK_ARM_NS: (ARM formats) Set NS and NSTABLE bits in |
| 67 | * stage 1 PTEs, for hardware which insists on validating them |
| 68 | * even in non-secure state where they should normally be ignored. |
| 69 | * |
| 70 | * IO_PGTABLE_QUIRK_NO_PERMS: Ignore the IOMMU_READ, IOMMU_WRITE and |
| 71 | * IOMMU_NOEXEC flags and map everything with full access, for |
| 72 | * hardware which does not implement the permissions of a given |
| 73 | * format, and/or requires some format-specific default value. |
| 74 | * |
| 75 | * IO_PGTABLE_QUIRK_ARM_MTK_EXT: (ARM v7s format) MediaTek IOMMUs extend |
| 76 | * to support up to 35 bits PA where the bit32, bit33 and bit34 are |
| 77 | * encoded in the bit9, bit4 and bit5 of the PTE respectively. |
| 78 | * |
| 79 | * IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT: (ARM v7s format) MediaTek IOMMUs |
| 80 | * extend the translation table base support up to 35 bits PA, the |
| 81 | * encoding format is same with IO_PGTABLE_QUIRK_ARM_MTK_EXT. |
| 82 | * |
| 83 | * IO_PGTABLE_QUIRK_ARM_TTBR1: (ARM LPAE format) Configure the table |
| 84 | * for use in the upper half of a split address space. |
| 85 | * |
| 86 | * IO_PGTABLE_QUIRK_ARM_OUTER_WBWA: Override the outer-cacheability |
| 87 | * attributes set in the TCR for a non-coherent page-table walker. |
| 88 | * |
| 89 | * IO_PGTABLE_QUIRK_ARM_HD: Enables dirty tracking in stage 1 pagetable. |
| 90 | * IO_PGTABLE_QUIRK_ARM_S2FWB: Use the FWB format for the MemAttrs bits |
| 91 | * |
| 92 | * IO_PGTABLE_QUIRK_NO_WARN: Do not WARN_ON() on conflicting |
| 93 | * mappings, but silently return -EEXISTS. Normally an attempt |
| 94 | * to map over an existing mapping would indicate some sort of |
| 95 | * kernel bug, which would justify the WARN_ON(). But for GPU |
| 96 | * drivers, this could be under control of userspace. Which |
| 97 | * deserves an error return, but not to spam dmesg. |
| 98 | */ |
| 99 | #define IO_PGTABLE_QUIRK_ARM_NS BIT(0) |
| 100 | #define IO_PGTABLE_QUIRK_NO_PERMS BIT(1) |
| 101 | #define IO_PGTABLE_QUIRK_ARM_MTK_EXT BIT(3) |
| 102 | #define IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT BIT(4) |
| 103 | #define IO_PGTABLE_QUIRK_ARM_TTBR1 BIT(5) |
| 104 | #define IO_PGTABLE_QUIRK_ARM_OUTER_WBWA BIT(6) |
| 105 | #define IO_PGTABLE_QUIRK_ARM_HD BIT(7) |
| 106 | #define IO_PGTABLE_QUIRK_ARM_S2FWB BIT(8) |
| 107 | #define IO_PGTABLE_QUIRK_NO_WARN BIT(9) |
| 108 | unsigned long quirks; |
| 109 | unsigned long pgsize_bitmap; |
| 110 | unsigned int ias; |
| 111 | unsigned int oas; |
| 112 | bool coherent_walk; |
| 113 | const struct iommu_flush_ops *tlb; |
| 114 | struct device *iommu_dev; |
| 115 | |
| 116 | /** |
| 117 | * @alloc: Custom page allocator. |
| 118 | * |
| 119 | * Optional hook used to allocate page tables. If this function is NULL, |
| 120 | * @free must be NULL too. |
| 121 | * |
| 122 | * Memory returned should be zeroed and suitable for dma_map_single() and |
| 123 | * virt_to_phys(). |
| 124 | * |
| 125 | * Not all formats support custom page allocators. Before considering |
| 126 | * passing a non-NULL value, make sure the chosen page format supports |
| 127 | * this feature. |
| 128 | */ |
| 129 | void *(*alloc)(void *cookie, size_t size, gfp_t gfp); |
| 130 | |
| 131 | /** |
| 132 | * @free: Custom page de-allocator. |
| 133 | * |
| 134 | * Optional hook used to free page tables allocated with the @alloc |
| 135 | * hook. Must be non-NULL if @alloc is not NULL, must be NULL |
| 136 | * otherwise. |
| 137 | */ |
| 138 | void (*free)(void *cookie, void *pages, size_t size); |
| 139 | |
| 140 | /* Low-level data specific to the table format */ |
| 141 | union { |
| 142 | struct { |
| 143 | u64 ttbr; |
| 144 | struct { |
| 145 | u32 ips:3; |
| 146 | u32 tg:2; |
| 147 | u32 sh:2; |
| 148 | u32 orgn:2; |
| 149 | u32 irgn:2; |
| 150 | u32 tsz:6; |
| 151 | } tcr; |
| 152 | u64 mair; |
| 153 | } arm_lpae_s1_cfg; |
| 154 | |
| 155 | struct { |
| 156 | u64 vttbr; |
| 157 | struct { |
| 158 | u32 ps:3; |
| 159 | u32 tg:2; |
| 160 | u32 sh:2; |
| 161 | u32 orgn:2; |
| 162 | u32 irgn:2; |
| 163 | u32 sl:2; |
| 164 | u32 tsz:6; |
| 165 | } vtcr; |
| 166 | } arm_lpae_s2_cfg; |
| 167 | |
| 168 | struct { |
| 169 | u32 ttbr; |
| 170 | u32 tcr; |
| 171 | u32 nmrr; |
| 172 | u32 prrr; |
| 173 | } arm_v7s_cfg; |
| 174 | |
| 175 | struct { |
| 176 | u64 transtab; |
| 177 | u64 memattr; |
| 178 | } arm_mali_lpae_cfg; |
| 179 | |
| 180 | struct { |
| 181 | u64 ttbr[4]; |
| 182 | u32 n_ttbrs; |
| 183 | } apple_dart_cfg; |
| 184 | |
| 185 | struct { |
| 186 | int nid; |
| 187 | } amd; |
| 188 | }; |
| 189 | }; |
| 190 | |
| 191 | /** |
| 192 | * struct arm_lpae_io_pgtable_walk_data - information from a pgtable walk |
| 193 | * |
| 194 | * @ptes: The recorded PTE values from the walk |
| 195 | */ |
| 196 | struct arm_lpae_io_pgtable_walk_data { |
| 197 | u64 ptes[4]; |
| 198 | }; |
| 199 | |
| 200 | /** |
| 201 | * struct io_pgtable_ops - Page table manipulation API for IOMMU drivers. |
| 202 | * |
| 203 | * @map_pages: Map a physically contiguous range of pages of the same size. |
| 204 | * @unmap_pages: Unmap a range of virtually contiguous pages of the same size. |
| 205 | * @iova_to_phys: Translate iova to physical address. |
| 206 | * @pgtable_walk: (optional) Perform a page table walk for a given iova. |
| 207 | * |
| 208 | * These functions map directly onto the iommu_ops member functions with |
| 209 | * the same names. |
| 210 | */ |
| 211 | struct io_pgtable_ops { |
| 212 | int (*map_pages)(struct io_pgtable_ops *ops, unsigned long iova, |
| 213 | phys_addr_t paddr, size_t pgsize, size_t pgcount, |
| 214 | int prot, gfp_t gfp, size_t *mapped); |
| 215 | size_t (*unmap_pages)(struct io_pgtable_ops *ops, unsigned long iova, |
| 216 | size_t pgsize, size_t pgcount, |
| 217 | struct iommu_iotlb_gather *gather); |
| 218 | phys_addr_t (*iova_to_phys)(struct io_pgtable_ops *ops, |
| 219 | unsigned long iova); |
| 220 | int (*pgtable_walk)(struct io_pgtable_ops *ops, unsigned long iova, void *wd); |
| 221 | int (*read_and_clear_dirty)(struct io_pgtable_ops *ops, |
| 222 | unsigned long iova, size_t size, |
| 223 | unsigned long flags, |
| 224 | struct iommu_dirty_bitmap *dirty); |
| 225 | }; |
| 226 | |
| 227 | /** |
| 228 | * alloc_io_pgtable_ops() - Allocate a page table allocator for use by an IOMMU. |
| 229 | * |
| 230 | * @fmt: The page table format. |
| 231 | * @cfg: The page table configuration. This will be modified to represent |
| 232 | * the configuration actually provided by the allocator (e.g. the |
| 233 | * pgsize_bitmap may be restricted). |
| 234 | * @cookie: An opaque token provided by the IOMMU driver and passed back to |
| 235 | * the callback routines in cfg->tlb. |
| 236 | */ |
| 237 | struct io_pgtable_ops *alloc_io_pgtable_ops(enum io_pgtable_fmt fmt, |
| 238 | struct io_pgtable_cfg *cfg, |
| 239 | void *cookie); |
| 240 | |
| 241 | /** |
| 242 | * free_io_pgtable_ops() - Free an io_pgtable_ops structure. The caller |
| 243 | * *must* ensure that the page table is no longer |
| 244 | * live, but the TLB can be dirty. |
| 245 | * |
| 246 | * @ops: The ops returned from alloc_io_pgtable_ops. |
| 247 | */ |
| 248 | void free_io_pgtable_ops(struct io_pgtable_ops *ops); |
| 249 | |
| 250 | |
| 251 | /* |
| 252 | * Internal structures for page table allocator implementations. |
| 253 | */ |
| 254 | |
| 255 | /** |
| 256 | * struct io_pgtable - Internal structure describing a set of page tables. |
| 257 | * |
| 258 | * @fmt: The page table format. |
| 259 | * @cookie: An opaque token provided by the IOMMU driver and passed back to |
| 260 | * any callback routines. |
| 261 | * @cfg: A copy of the page table configuration. |
| 262 | * @ops: The page table operations in use for this set of page tables. |
| 263 | */ |
| 264 | struct io_pgtable { |
| 265 | enum io_pgtable_fmt fmt; |
| 266 | void *cookie; |
| 267 | struct io_pgtable_cfg cfg; |
| 268 | struct io_pgtable_ops ops; |
| 269 | }; |
| 270 | |
| 271 | #define io_pgtable_ops_to_pgtable(x) container_of((x), struct io_pgtable, ops) |
| 272 | |
| 273 | static inline void io_pgtable_tlb_flush_all(struct io_pgtable *iop) |
| 274 | { |
| 275 | if (iop->cfg.tlb && iop->cfg.tlb->tlb_flush_all) |
| 276 | iop->cfg.tlb->tlb_flush_all(iop->cookie); |
| 277 | } |
| 278 | |
| 279 | static inline void |
| 280 | io_pgtable_tlb_flush_walk(struct io_pgtable *iop, unsigned long iova, |
| 281 | size_t size, size_t granule) |
| 282 | { |
| 283 | if (iop->cfg.tlb && iop->cfg.tlb->tlb_flush_walk) |
| 284 | iop->cfg.tlb->tlb_flush_walk(iova, size, granule, iop->cookie); |
| 285 | } |
| 286 | |
| 287 | static inline void |
| 288 | io_pgtable_tlb_add_page(struct io_pgtable *iop, |
| 289 | struct iommu_iotlb_gather * gather, unsigned long iova, |
| 290 | size_t granule) |
| 291 | { |
| 292 | if (iop->cfg.tlb && iop->cfg.tlb->tlb_add_page) |
| 293 | iop->cfg.tlb->tlb_add_page(gather, iova, granule, iop->cookie); |
| 294 | } |
| 295 | |
| 296 | /** |
| 297 | * enum io_pgtable_caps - IO page table backend capabilities. |
| 298 | */ |
| 299 | enum io_pgtable_caps { |
| 300 | /** @IO_PGTABLE_CAP_CUSTOM_ALLOCATOR: Backend accepts custom page table allocators. */ |
| 301 | IO_PGTABLE_CAP_CUSTOM_ALLOCATOR = BIT(0), |
| 302 | }; |
| 303 | |
| 304 | /** |
| 305 | * struct io_pgtable_init_fns - Alloc/free a set of page tables for a |
| 306 | * particular format. |
| 307 | * |
| 308 | * @alloc: Allocate a set of page tables described by cfg. |
| 309 | * @free: Free the page tables associated with iop. |
| 310 | * @caps: Combination of @io_pgtable_caps flags encoding the backend capabilities. |
| 311 | */ |
| 312 | struct io_pgtable_init_fns { |
| 313 | struct io_pgtable *(*alloc)(struct io_pgtable_cfg *cfg, void *cookie); |
| 314 | void (*free)(struct io_pgtable *iop); |
| 315 | u32 caps; |
| 316 | }; |
| 317 | |
| 318 | extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s1_init_fns; |
| 319 | extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s2_init_fns; |
| 320 | extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s1_init_fns; |
| 321 | extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s2_init_fns; |
| 322 | extern struct io_pgtable_init_fns io_pgtable_arm_v7s_init_fns; |
| 323 | extern struct io_pgtable_init_fns io_pgtable_arm_mali_lpae_init_fns; |
| 324 | extern struct io_pgtable_init_fns io_pgtable_amd_iommu_v1_init_fns; |
| 325 | extern struct io_pgtable_init_fns io_pgtable_amd_iommu_v2_init_fns; |
| 326 | extern struct io_pgtable_init_fns io_pgtable_apple_dart_init_fns; |
| 327 | |
| 328 | #endif /* __IO_PGTABLE_H */ |
| 329 | |